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PAS302BCW-22S 데이터시트 PDF




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부품번호 PAS302BCW-22S 기능
기능 CMOS VGA DIGITAL IMAGE SENSOR
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PAS302BCW-22S 데이터시트, 핀배열, 회로
PAS302BCW-22S
CMOS Image Sensor IC
PAS302BCW-22S CMOS VGA DIGITAL IMAGE SENSOR
General Description
The PAS302BCW-22S is a highly integrated CMOS active-pixel image sensor that has a VGA
resolution of 644H x 484V. The PAS302BCW-22S outputs 8-bit RGB raw data through a parallel data
bus and is available in 22-pin CSP package.
The PAS302BCW-22S can be programmed to set the exposure time for different luminance condition
via I2CTM serial control bus. By programming the internal register sets, it can perform on-chip frame
rate adjustment, offset correction DAC and programmable gain control.
Features
Key Specification
ƒ VGA(644 x 484 pixels) resolution, ~1/4”
Lens
Supply Voltage
2.5V ~ 3.3V
ƒ Bayer-RGB color filter array
ƒ Output format: 8-bit parallel RGB raw data
ƒ On-chip 10-bit pipelined A/D converter
ƒ On-chip programmable gain amplifier
Resolution
Array diagonal
Pixel Size
644(H) x 484(V)
4.5mm (~1/4”Optic)
5.6µmx5.6µm
‰ 4-bit color gain amplifier (x1~x2)
‰ 4-bit global gain amplifier (x1~x2)
ƒ Digital gain stage
ƒ Continuous variable frame
time(1/2sec~1/30sec)
Chief Ray Angle
Frame rate
System clock
20~ 22
~30 fps
Up to 48 MHz
ƒ Continuous variable exposure time
Pixel clock
Up to 12MHz
ƒ I2CTM Interface
ƒ Support flash light timing
ƒ Single 2.5V / 3.3V supply voltage
ƒ < 15mA(~30 fps) power dissipation
ƒ 2µA power dissipation when power down
mode
ƒ Window-Of-Interest (WOI)
ƒ Sub-sampling
ƒ Defect compensation
ƒ Pin-to-pin compatible to OV7648
Sensitivity
Color filter
Exposure Time
Scan Mode
S/N Ratio
Package
1.56 V/Lux-Sec
RGB Bayer Pattern
~ Frame time to Line time
Progressive
> 45 dB
22-pin lead-free CSP
Note1: Only two decoupling capacitors needed
Note2: Good sensitivity compared to competitors
Version 2.4, 20 Sep. 2005
PixArt Imaging Inc.
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PAS302BCW-22S pdf, 반도체, 판매, 대치품
PAS302BCW-22S
CMOS Image Sensor IC
3. Function Description
3.1 Defect Compensation
The Defect Compensation block can detect the possible defect pixel and replace it with average
output of like-colored pixels from near side of defect pixel. There is no limitation capability of
defect pixel number. This function can be programmed to enable/disable by user.
3.2 Companding Curves
The companding function which means compressing and expanding is used to simulate the
gamma curve and do non-linear transformation before the data is output. There are 4 curves
selected by setting Register Compand_Sel as shown in Fig. 3.1. This function can be
programmed to enable/disable by user.
Figure 3.1 Companding curves programmed by Compand_EnH and Compand_Sel.
3.3 Power Down Mode
The PAS302BCW-22S can be powered down by setting register “Sw_PwrDn” = 1 or by enable
Pwdn pin. The register value will sustain in the power down mode. PAS302BCW-22S supports 2
power down modes:
z Software power down Set register “Sw_PwrDn” = 1 to power down all the internal block
except I2CTM .
z Hardware power down Pull Pwdn pin to high to power down the chip. The chip will go into
standby mode.
3.4 Reset Mode
The PAS302BCW-22S can be reseted by setting register “Sw_Reset” = 1 or by enable Reset
pin. PAS302BCW-22S supports 2 reset modes:
z Software reset Set register “Sw_Reset” = 1 to reset all the I2CTM registers.
z Hardware reset Pull Reset pin to high to reset the full chip.
Version 2.4, 20 Sep. 2005
PixArt Imaging Inc.
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PAS302BCW-22S 전자부품, 판매, 대치품
PAS302BCW-22S
CMOS Image Sensor IC
5. I2CTM Bus
PAS302BCW-22S supports I2CTM bus transfer protocol and acts as slave device. The 7 bits
unique slave address is 1000000 and the bus supports receiving / transmitting speed up to
400kHz.
5.1 I2CTM Bus Overview
There are only two lines SDA (serial data) and SCL (serial clock) carry information between
the devices which are connected by I2CTM bus. Normally both SDA and SCL lines are open
collector structure and pulled high by external pull-up resistors.
Only the master can initiate a transfer (start), generate clock signals, and terminate a transfer
(stop).
Start Condition :
A high to low transition of the SDA line while SCL is high defines a start condition.
Stop Condition :
A low to high transition of the SDA line while SCL is high defines a stop condition.
Valid Data:
The data on the SDA line must be stable during the high period of the SCL clock. Within each
byte, MSB is always transferred first. Read/write control bit is the LSB of the first byte.
Both the master and slave can transmit and receive data from the bus.
Acknowledge :
The receiving device should pull down the SDA line during high period of the SCL clock line
when a byte was transferred completely by transmitter. When in the case of that a master
received data from a slave, the master does not generate an acknowledgment on the last
byte to indicate the end of a master read cycle.
Figure 5-1: Start and Stop Conditions
SDA
SCL
DATA
STABLE
DATA
CHANGE
ALLOWED
Figure 5-2: Valid Data
Version 2.4, 20 Sep. 2005
PixArt Imaging Inc.
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부품번호상세설명 및 기능제조사
PAS302BCW-22S

CMOS VGA DIGITAL IMAGE SENSOR

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