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PDF AT42QT1111-AU Data sheet ( Hoja de datos )

Número de pieza AT42QT1111-AU
Descripción QTouch 11-key Sensor IC
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! AT42QT1111-AU Hoja de datos, Descripción, Manual

Features
Sensor Keys:
– Up to 11 QTouchchannels
Data Acquistion:
– Measurement of keys triggered either by a signal applied to the SYNC pin or at
regular intervals timed by the AT42QT1110's internal clock
– Keys measured sequentially for better performance, or in parallel groups for faster
operation
– Raw data for key touches can be read as a report over the SPI interface
Discrete Outputs:
– Configurable “Detect” outputs indicating individual key touch (7-key mode)
Device Setup:
– Device configuration can be stored in EEPROM
Technology:
– Patented spread-spectrum charge-transfer (direct mode)
Key Outline Sizes:
– 6 mm x 6 mm or larger (panel thickness dependent); widely different sizes and
shapes possible, including solid or ring shapes
Key Spacings:
– 7 mm center to center or more (panel thickness dependent)
Layers Required:
– One
Electrode Materials:
– Etched copper, silver, carbon, Indium Tin Oxide (ITO)
Electrode Substrates:
– PCB, FPCB, plastic films, glass
Panel Materials:
– Plastic, glass, composites, painted surfaces (low particle density metallic paints
possible)
Panel Thickness:
– Up to 10 mm glass, 5 mm plastic (electrode size dependent)
Key Sensitivity:
– Individually settable via simple commands over serial interface
Adjacent Key Suppression® (AKS)
– Patented AKS technology to enable accurate key detection
Interface:
– Full-duplex SPI slave mode (750 KHz), “change” pin, discrete detection outputs
Moisture Tolerance Good
Power:
– 1.8V ~ 5.5V
Package:
– 32-pin 5 x 5 mm MLF RoHS compliant
– 32-pin 7 x 7 mm TQFP RoHS compliant
Signal Processing:
– Self-calibration, auto drift compensation, noise filtering, AKS technology
Applications:
– Consumer and industrial applications, such as TV, media player, etc
QTouch11-key
Sensor IC
AT42QT1111-MU
AT42QT1111-AU
9571A–AT42–02/10

1 page




AT42QT1111-AU pdf
AT42QT1111-MU/AT42QT1111-AU
Figure 1-2. Typical Circuit: 11 Keys With No External Trigger
Vunreg
VREG
QT1111
9571A–AT42–02/10
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AT42QT1111-AU arduino
AT42QT1111-MU/AT42QT1111-AU
4.1.3
CRC Bytes
If enabled, a CRC checking procedure is implemented on all communications between the SPI
master and the QT1111. In this case, each command or report request sent by the master must
have a byte appended containing the CRC checksum of the data sent. The QT1111 will not
respond to commands until the CRC byte has been received and verified.
Sample C code showing the algorithm for calculating the CRC of the data can be found in
Appendix A.
When the QT1111 is expecting a CRC byte, it returns (on MISO) the calculated CRC byte which
it expects to receive. This is sent simultaneously with the QT1111 receiving the CRC byte from
the master (that is, during the same byte exchange). This allows both devices to confirm that the
data was sent correctly.
All data returned by the QT1111 is also be followed by a CRC byte, allowing the master to
confirm the integrity of the data transmission.
4.1.4
SPI Commands
There are three types of communication between the SPI master and the QT1111:
• Control commands (see Section 5 on page 22)
– To send control instructions to the QT1111
• Report requests (see Section 6 on page 24)
– To reading status information from the QT1111
• Setup commands (see Section 7 on page 28)
– To set configuration options (“Set” instructions)
– To read configuration options (“Get” instructions)
Additionally the “Null” command (0x00) is transmitted by the host device as it is receiving data
from the QT1111.
4.1.4.1
Control Commands
A control command is an instruction sent to the QT1111 that controls operations of the device,
and for which no response is required. Examples of control commands are: “Reset”, “Calibrate”,
“Send Setups”.
With the exception of “Send Setups”, control commands normally require a single byte
exchange, unless CRC checking is enabled, in which case a second byte must be transmitted
by the host with the calculated CRC of the command byte.
Figure 4-1. Sleep Command – CRC Disabled
Host (Sends on MOSI)
Device (Responds on MISO)
Command: 0x05
Response: 0x55 (Idle” – Fresh Command)
Simultaneous
Transmission
9571A–AT42–02/10
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