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PDF STD3PS25-1 Data sheet ( Hoja de datos )
| Número de pieza | STD3PS25-1 | |
| Descripción | P-CHANNEL MOSFET | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STD3PS25 - STD3PS25-1
P-CHANNEL 250V - 2.1Ω - 3A DPAK/IPAK
MESH OVERLAY™ MOSFET
TYPE
VDSS
RDS(on)
ID
STD3PS25
STD3PS25-1
250 V
250 V
< 2.8 Ω
< 2.8 Ω
3A
3A
s TYPICAL RDS(on) = 2.1Ω
s 100% AVALANCHE TESTED
s APPLICATION ORIENTED
CHARACTERIZATION
s STANDARD OUTLINE FOR EASY
AUTOMATED SURFACE MOUNT ASSEMBLY
s GATE-SOURCE ZENER DIODE
3
1
DPAK
IPAK
3
2
1
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou-
pled with the Company’s proprietary edge termina-
tion structure, makes it suitable in coverters for
lighting applications.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s CONSUMER
s LIGHTING
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM (1) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
Value
250
250
±25
3
1.9
12
45
0.36
– 50 to 150
150
Unit
V
V
V
A
A
A
W
W/°C
°C
°C
June 2003
1/10
1 page  
Gate Charge vs Gate-source Voltage p-ch
STD3PS25 - STD3PS25-1
Capacitance Variations p-ch
Norm. Gate Thereshold Voltage vs Temp p-ch NormalizedOnResistancevsTemperaturep-ch
Source-drainDiodeForwardCharacteristicsp-ch Normalized BVDSS vs Temperature p-ch
5/10
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet STD3PS25-1.PDF ] | |
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