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Número de pieza | EM78F642N | |
Descripción | Flash Series 8-Bit Microcontroller | |
Fabricantes | ELAN Microelectronics | |
Logotipo | ||
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No Preview Available ! EM78F648/644/642/641N
548/544/542/541N
Flash Series 8-Bit
Microcontroller
Product
Specification
DOC. VERSION 1.2
ELAN MICROELECTRONICS CORP.
March 2013
1 page Contents
6.3 Operational Registers for EM78F648/548N ..................................................... 49
6.3.1 R0: IAR (Indirect Addressing Register) .............................................................49
6.3.2 R1: BSR (Bank Selection Control Register) .....................................................49
6.3.3 R2: PC (Program Counter) ...............................................................................49
6.3.4 R3: SR (Status Register)...................................................................................53
6.3.5 R4: RSR (RAM Select Register) .......................................................................54
6.3.6 Bank 0 R5 ~ R9 (Port 5 ~ Port 9)......................................................................54
6.3.7 Bank 0 RA (Not Used).......................................................................................54
6.3.8 Bank 0 RB OMCR (Operating Mode Control Register) ....................................54
6.3.9 Bank 0 RC: ISR1 (Interrupt Status Register 1) .................................................56
6.3.10 Bank 0 RD: ISR2 (Interrupt Status Register 2) .................................................57
6.3.11 Bank 0 RE: ISR3 (Interrupt Status Register 3) .................................................57
6.3.12 Bank 0 RF .........................................................................................................58
6.3.13 Bank 0 R10: EIESCR (External Interrupt Edge Select Control Register) .........58
6.3.14 Bank 0 R11: WDTCR ........................................................................................58
6.3.15 Bank 0 R12: LVDCR (Low Voltage Detector Control Register) ........................59
6.3.16 Bank 0 R13: TCCCR (TCC Control Register)...................................................59
6.3.17 Bank 0 R14: TCCDATA (TCC Data Register) ...................................................60
6.3.18 Bank 0 R15~R19 (IOCR5~IOCR9) ...................................................................60
6.3.19 Bank 0 R1A~R1B..............................................................................................60
6.3.20 Bank 0 R1C: IMR1 (Interrupt Mask Register 1) ................................................60
6.3.21 Bank 0 R1D: IMR2 (Interrupt Mask Register 2) ................................................61
6.3.22 Bank 0 R1E: IMR3 (Interrupt Mask Register 3) ................................................62
6.3.23 Bank 0 R1F .......................................................................................................62
6.3.24 Bank 0 R20: P5WUCR (Port 5 Wake Up Control Register)..............................63
6.3.25 Bank 0 R21: P5WUECR (Port 5 Wake-up Edge Control Register) ..................63
6.3.26 Bank 0 R22: P7WUCR (Port 7 Wake-up Control Register) ..............................63
6.3.27 Bank 0 R23: P7WUECR (Port 7 Wake-up Edge Control Register) ..................63
6.3.28 Bank 0 R24~R2A ..............................................................................................63
6.3.29 Bank 0 R2B: SPICR (SPI Control Register) .....................................................64
6.3.30 Bank0 R2C: SPIS (SPI Status Register)...........................................................65
6.3.31 Bank 0 R2D: SPIR (SPI Read Buffer Register) ................................................65
6.3.32 Bank 0 R2E: SPIR (SPI Write Buffer Register).................................................65
6.3.33 Bank 0 R2F: WUCR1 (Wake-up Control Register 1) ........................................66
6.3.34 Bank 0 R30~R31...............................................................................................66
6.3.35 Bank 0 R32: URCR1 (UART Control Register 1)..............................................67
6.3.36 Bank 0 R33: URCR2 (UART Control Register 2)..............................................67
6.3.37 Bank 0 R34: URS (UART Status Register) .......................................................68
6.3.38 Bank 0 R35: URRD (UART Receive Data Buffer Register) ..............................69
6.3.39 Bank 0 R36: URTD (UART Transmit Data Buffer Register)..............................69
6.3.40 Bank 0 R37: TBPTL (Table Pointer Low Register)............................................69
6.3.41 Bank 0 R38: TBPTH (Table Pointer High Register) ..........................................69
Product Specification (V1.2) 03.15.2013
•v
5 Page Contents
Doc. Version
1.0
1.1
1.2
Specification Revision History
Revision Description
Initial release version
1. Modified the contents of the Operating Frequency
Range vs. Operating Voltage in Section 2 Features
2. Modified the description of the Control-bit TS.
3. Modified the descriptions in the Section TCC/WDT and
Prescaler.
4. Modfied Figure 6-11 TCC and WDT Block Diagram.
5. Modified the maximum supportable baud rate of the
SPI function.
1. Modified the pin number of EM78F641/541N in
Figure 3-4
2. Added LVR specification in the DC Electrical
Characteristics section.
Date
2010/05/05
2012/07/17
2013/03/15
Product Specification (V1.2) 03.15.2013
• xi
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet EM78F642N.PDF ] |
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