PDF ICS951462 Data sheet ( Hoja de datos )

Número de pieza	ICS951462
Descripción	Programmable System Clock Chip
Fabricantes	ICS
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ICS951462 Programmable System Clock Chip for ATI RS/RD690 - K8TM based Systems Recommended Application: ATI RS/RD690 systems using AMD K8 processors & SB600 Southbridge Output Features: • 2 - pairs of CPU pairs • 8 - pairs of SRC pairs • 4 - pairs of ATIG pairs • 1 - HyperTransport 66MHz clock seed • 2 - 48MHz USB clock • 3 - 14.318MHz Reference clock Key Specifications: • CPU outputs cycle-to-cycle jitter < 85ps • SRC outputs cycle-to-cycle jitter < 125ps • ATIG outputs cycle-to-cycle jitter < 125ps • +/- 300ppm frequency accuracy on CPU, SRC & ATIG clocks Features/Benefits: • 3 - Programmable Clock Request pins for SRC and ATIG clocks • ATIGCLKs are programmable for frequency • Spread Spectrum for EMI reduction • Outputs may be disabled via SMBus • External crystal load capacitors for maximum frequency accuracy Functionality FS2 FS1 FS0 000 001 010 011 100 101 110 111 CPU MHz Hi-Z X/2 230.00 240.00 100.00 133.33 166.67 200.00 HTT MHz Hi-Z X/3 76.67 80.00 66.66 66.66 66.66 66.66 SRC M Hz 100.00 100.00 100.00 100.00 100.00 100.00 100.00 100.00 ATIG M Hz 100.00 100.00 100.00 100.00 100.00 100.00 100.00 100.00 USB M Hz 48.00 48.00 48.00 48.00 48.00 48.00 48.00 48.00 Pin Configuration GNDREF 1 64 FS0/REF0 VDDREF 2 63 FS1/REF1 X1 3 X2 4 62 FS2/REF2 61 PD** VDD48 5 48MHz_0 6 48MHz_1 7 60 VDDHTT 59 HTTCLK0 58 GNDHTT GND48 8 57 CLKREQA# SMBCLK 9 56 CPUCLK8T0 SMBDAT 10 55 CPUCLK8C0 RESET_IN# 11 54 VDDCPU SRCCLKT7 12 53 GNDCPU SRCCLKC7 13 52 CPUCLK8T1 VDDSRC 14 GNDSRC 15 51 CPUCLK8C1 50 VDDA SRCCLKT6 16 SRCCLKC6 17 SRCCLKT5 18 49 GNDA 48 IREF 47 SRCCLKT0 SRCCLKC5 19 SRCCLKT4 20 46 SRCCLKC0 45 GNDSRC SRCCLKC4 21 44 VDDSRC GNDSRC 22 43 SRCCLKT1 VDDSRC 23 42 SRCCLKC1 SRCCLKT3 24 41 ATIGCLKT0 SRCCLKC3 25 40 ATIGCLKC0 SRCCLKT2 26 39 VDDATIG SRCCLKC2 27 VDDSRC 28 GNDSRC 29 38 GNDATIG 37 ATIGCLKT1 36 ATIGCLKC1 ATIGCLKT3 30 ATIGCLKC3 31 35 ATIGCLKT2 34 ATIGCLKC2 CLKREQB# 32 33 CLKREQC# 64-TSSOP Internal Pull-Up Resistor ** Internal Pull-Down Resistor Power Groups Pin Number VDD GND 58 14,23,28,44 15,22,29,45 39 38 50 49 54 53 60 58 21 1094J—03/16/09 Description USB_48 outputs SRCCLK outputs ATIGCLK differential outputs Analog, PLL CPUCLK8 differential outputs HTTCLK output REF outputs *Other names and brands may be claimed as the property of others. 1 page Integrated Circuit Systems, Inc. Table1: CPU and HTT Frequency Selection Table Byte 0 Bit4 Bit3 Bit2 Bit1 Bit0 CPUCLK (2:0) CPU CPU CPU CPU CPU (MHz) SS_EN FS3 FS2 FS1 FS0 HTT (MHz) Spread % Overclock % 0 0 0 0 0 Hi-Z Hi-Z None 0 0 0 0 1 X / 2 X / 3 None 0 0 0 1 0 230.00 76.67 None 15% 0 0 0 1 1 240.00 80.00 None 20% 0 0 1 0 0 100.00 66.67 None 0 0 1 0 1 133.33 66.67 None 0 0 1 1 0 166.67 66.67 None 0% 0 0 1 1 1 200.00 66.67 None 0 1 0 0 0 250.00 83.33 None 25% 0 1 0 0 1 260.00 86.67 None 30% 0 1 0 1 0 270.00 90.00 None 35% 0 1 0 1 1 280.00 93.33 None 40% 0 1 1 0 0 102.00 68.00 None 0 1 1 0 1 136.00 68.00 None 0 1 1 1 0 170.00 68.00 None 2% 0 1 1 1 1 204.00 68.00 None 1 0 0 0 0 210.00 70.00 -0.5% 5% 1 0 0 0 1 220.00 73.33 -0.5% 10% 1 0 0 1 0 230.00 76.67 -0.5% 15% 1 0 0 1 1 240.00 80.00 -0.5% 20% 1 0 1 0 0 100.00 66.67 -0.5% 1 0 1 0 1 133.33 66.67 -0.5% 0% 1 0 1 1 0 166.67 66.67 -0.5% 1 0 1 1 1 200.00 66.67 -0.5% 1 1 0 0 0 250.00 83.33 -0.5% 25% 1 1 0 0 1 260.00 86.67 -0.5% 30% 1 1 0 1 0 270.00 90.00 -0.5% 35% 1 1 0 1 1 280.00 93.33 -0.5% 40% 1 1 1 0 0 102.00 68.00 -0.5% 1 1 1 1 0 1 136.00 68.00 -0.5% 1 1 1 0 170.00 68.00 -0.5% 2% 1 1 1 1 1 204.00 68.00 -0.5% ICS951462 1094J—03/16/09 5 5 Page Integrated Circuit Systems, Inc. ICS951462 SMBus Table: CLKREQA# and CLKREQC# Output Control Register Byte 4 Pin # Name Control Function Bit 7 12,13 REQASRC7 CLKREQA# Controls SRC7 Bit 6 16,17 REQASRC6 CLKREQA# Controls SRC6 Bit 5 18,19 REQASRC5 CLKREQA# Controls SRC5 Bit 4 43,42 REQCSRC1 CLKREQC# Controls SRC1 Bit 3 35,34 REQCATIG2 CLKREQC# Controls ATIG2 Bit 2 37,36 REQCATIG1 CLKREQC# Controls ATIG1 Bit 1 41,40 REQCATIG0 CLKREQC# Controls ATIG0 Bit 0 47,46 REQCSRC0 CLKREQC# Controls SRC0 SMBus Table: CPU Stop Control and SRC Frequency Select Register Byte 5 Pin # Name Control Function Bit 7 Reserved Bit 6 Reserved Bit 5 Reserved Bit 4 SRC, Differential Output Disable ATIG Mode Hi-Z or Driven when disable Bit 3 - SRC FS3 SRC Freq Select Bit 3 Bit 2 - SRC FS2 SRC Freq Select Bit 2 Bit 1 Bit 0 - - SRC FS1 SRC FS0 SRC Freq Select Bit 1 SRC Freq Select Bit 0 SMBus Table: Device ID Register Byte 6 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Pin # - - - - - - - Name Device ID7 (MSB) Device ID6 Device ID5 Device ID4 Device ID3 Device ID2 Device ID1 Bit 0 - Device ID0 (LSB) Control Function DEVICE ID SMBus Table: Revision and Vendor ID Register Byte 7 Pin # Name Bit 7 - RID3 Bit 6 - RID2 Bit 5 - RID1 Bit 4 - RID0 Bit 3 - VID3 Bit 2 - VID2 Bit 1 - VID1 Bit 0 - VID0 Control Function REVISION ID VENDOR ID Type RW RW RW RW RW RW RW RW Type RW RW RW RW RW Type R R R R R R R R Type R R R R R R R R 0 Does not control Does not control Does not control Does not control Does not control Does not control Does not control Does not control 1 Controls Controls Controls Controls Controls Controls Controls Controls PWD 0 0 0 0 0 0 0 0 01 Driven Hi-Z See Table 2: SRC Frequency Selection Table PWD 0 0 0 0 0 0 0 0 0 1 PWD - -0 - -1 - -1 - -0 - -0 - -0 - -1 - -0 0 1 PWD - -0 - -0 - -0 - -1 - -0 - -0 - -0 - -1 1094J—03/16/09 11 11 Page

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