|
|
PDF CS495303 Data sheet ( Hoja de datos )
| Número de pieza | CS495303 | |
| Descripción | Audio Decoder DSP Family | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de CS495303 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
CS4953xx Data Sheet
FEATURES
Multi-standard 32-bit Audio Decoding plus Post
processing
Supports legacy audio formats and a wide array of post-
processing
— Dolby Digital® EX, Dolby Pro Logic® II, IIx, IIz 7.1,
Dolby Headphone® 2, Dolby Virtual Speaker® 2,
Dolby Volume® (original), Dolby Volume 258™ (lite),
Audistry®
— DTS-ES 96/24™ Discrete 7.1, DTS-ES™ Discrete 7.1,
DTS-ES™ Matrix 6.1, DTS Neo:6®, DTS Neural
Surround™ DTS Surround Sensation Speaker
— MPEG-2 AAC™ LC 5.1
— SRS® Circle Surround® II, SRS Circle Surround Auto,
SRS Circle Surround Decoder Optimized, SRS
TruVolume™ 7.1 (V 2.1.0.0), SRS TruSurround
HD/HD4®, SRS WOW HD™, SRS CS Headphone™,
SRS Circle Cinema 3D™, SRS Studio Sound HD™
— THX® Ultra2™, THX Select2™
Cirrus Logic’s Applications Library
— Cirrus Original Multi-Channel Surround 2 (COMS2),
Cirrus Band XpandeR™, Cirrus Virtualization
Technology (CVT), Cirrus Intelligent Room Calibration
2 (IRC2), Cirrus Bass Enhancement (CBE)
— Crossbar Mixer, Signal Generator
— Advanced Post-Processors including: 7.1 Bass
Manager Quadruple Crossover, Tone Control, 11-
Band Parametric EQ, Delay, 2:1/4:1 Decimator,
1:2/1:4 Upsampler
Up to 12 Channels of 32-bit Serial Audio Input
Audio Decoder DSP Family with
Dual 32-bit DSP Engine Technology
16 Ch x 32-bit PCM Out with Dual 192 kHz S/PDIF Tx
Two SPI™/I2C™ Ports
Customer Software Security Keys
Large On-chip X, Y, and Program RAM & ROM
SDRAM and Serial Flash Memory Support
The CS4953xx DSP family are the enhanced versions of the
CS495xx DSP family with higher overall performance and
lower system cost. The CS4953xx includes all mainstream
audio processing codes in on-chip ROM. This saves external
memory for code storage. In addition, the intensive decoding
tasks of Dolby Digital Surround EX®, AAC multi-channel,
DTS-ES 96/24, THX Ultra2 Cinema and Dolby Headphone
can be accomplished without the expense of external
SDRAM memory.
With larger internal memories than the CS495xx, the
CS49531x is designed to support up to 150 ms per channel
of lip-sync delay. With 150 MHz internal clock speed, the
CS4953xx supports the most demanding post-processing
requirements. It is also designed for easy upgrading.
Customers currently using the CS495xx can upgrade to the
CS4953xx with minor hardware and software changes.
Ordering Information
See page 28 for ordering information.
Serial
Control 1
12 Ch PCM
Audio In
S/PDIF S/PDIF
16 Ch PCM
Audio Out
Serial
Control 2
Parallel
Control
GPIO
Debug
Coyote 32-bit
DSP A
D
M
A
Coyote 32-bit
DSP B
PXY
PXY
Ext. Memory Controller
STC
TMR1
TMR2
PLL
http://www.cirrus.com
Copyright © 2012 Cirrus Logic, Inc.
All Rights Reserved
FEB 2012
DS705F2
1 page  
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
2.1 Migrating from CS4953x3 to CS4953x4
• The recommended way to boot the DSP for normal operation is “master boot”. Refer to Chapter 1 of the
CS4953x4/CS4970x4 System Designer’s Guide. CS4953x4 supports slave boot mode as well (used for
programming the serial flash with the DSP code, through the SCP2 port).
• CS4953x4 DSPs are only available in 128 pin package.
• The serial flash chip select pin used is pin 14 (GPIO0) for master boot. Cirrus Logic recommends that at
least an 8-Mb serial flash device be used. Refer to CS4953x4/CS4970x4 System Designer’s Guide for a
list of flash types that are currently supported.
• CS4953x4 DSP family supports DSP Condenser and DSP Manager API for runtime control/host
communication. Refer to CS4953x4/CS4970x4 System Designer’s Guide for details.
2.2 Licensing
Licenses are required for all third party audio decoding/processing algorithms, including the application notes.
contact your local Cirrus Sales representative for more information.
3 Code Overlays
The suite of software available for the CS4953xx family consists of an operating system (OS) and a library of
overlays. The overlays have been divided into three main groups called Decoders, Matrix-processors, and
Post-processors. All software components are defined below:
• OS/Kernel - Encompasses all non-audio processing tasks, including loading data from external memory,
processing host messages, calling audio-processing subroutines, error concealment, etc.
• Decoders - Any Module that initially writes data into the audio I/O buffers, e.g. AC-3™, DTS, PCM, etc. All
the decoding/processing algorithms listed below require delivery of PCM or IEC61937-packed,
compressed data via I2S- or LJ-formatted digital audio to the CS4953xx.
• Matrix-processors - Any module that processes audio I/O buffer PCM data in-place before the Post-
processors. Generally speaking, these modules alter the number of valid channels in the audio I/O buffer
through processes like Virtualization (n2 channels) or Matrix Decoding (2n channels). Examples are
Dolby ProLogic II, IIx, IIz and DTS Neo:6.
• Post-processors - Any module that processes audio I/O buffer PCM data in-place after the Matrix-
Processors. Examples are Bass Management, Audio Manager, Tone Control, EQ, Delay, Customer-
specific Effects, Dolby Headphone 2 and Dolby Virtual Speaker 2, etc.
The overlay structure reduces the time required to reconfigure the DSP when a processing change is
requested. Each overlay can be reloaded independently without disturbing the other overlays. For example,
when a new decoder is selected, the OS, matrix-, and post-processors do not need to be reloaded — only the
new decoder (the same is true for the other overlays).
Table 2 below lists the firmware available based on device selection. Refer to AN288, CS4953xx/CS497xxx
Firmware User’s Manual for the latest listing of application codes and Cirrus Framework™ modules available.
DS705F2
5
5 Page 
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
5.5 Thermal Data (144-pin LQFP)
Parameter
Symbol Min Typ Max
Unit
Thermal Resistance (Junction to Ambient)
Two-layer Board1
Four-layer Board2
θja
°C / Watt
— 48 —
— 40 —
Thermal Resistance (Junction to Top of Package)
Two-layer Board1
Four-layer Board2
ψjt
°C / Watt
— .39 —
— .33 —
5.6 Thermal Data (128-pin LQFP)
Parameter
Symbol Min Typ Max
Unit
Thermal Resistance (Junction to Ambient)
Two-layer Board1
Four-layer Board2
θja
°C / Watt
— 53 —
— 44 —
Thermal Resistance (Junction to Top of Package)
Two-layer Board1
Four-layer Board2
ψjt
°C / Watt
— .45 —
— .39 —
Notes: 1.
2.
3.
Two-layer board is specified as a 76 mm X 114 mm, 1.6 mm thick FR-4 material with 1-oz copper covering 20 %
of the top & bottom layers.
Four-layer board is specified as a 76 mm X 114 mm, 1.6 mm thick FR-4 material with 1-ounce copper covering
20 % of the top & bottom layers and 0.5-ounce copper covering 90 % of the internal power plane and ground plane
layers.
To calculate the die temperature for a given power dissipation
Τj = Ambient Temperature + [ (Power Dissipation in Watts) * θja ]
4. To calculate the case temperature for a given power dissipation
Τc = Τj - [ (Power Dissipation in Watts) * ψ jt ]
DS705F2
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CS495303.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| CS495303 | Audio Decoder DSP Family | Cirrus Logic |
| CS495304 | Audio Decoder DSP Family | Cirrus Logic |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |