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CS5346 데이터시트 PDF




Cirrus Logic에서 제조한 전자 부품 CS5346은 전자 산업 및 응용 분야에서
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부품번호 CS5346 기능
기능 Stereo Audio ADC
제조업체 Cirrus Logic
로고 Cirrus Logic 로고


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CS5346 데이터시트, 핀배열, 회로
CS5346
103-dB, 192-kHz, Stereo Audio ADC with 6:1 Input Mux
ADC Features
Multi-bit Delta–Sigma Modulator
103 dB Dynamic Range
-95 dB THD+N
Stereo 6:1 Input Multiplexer
Programmable Gain Amplifier (PGA)
– ± 12 dB Gain, 0.5-dB Step Size
– Zero-crossing, Click-free Transitions
Stereo Microphone Inputs
– +32 dB Gain Stage
– Low-noise Bias Supply
Up to 192 kHz Sampling Rates
Selectable 24-bit, Left-justified or I²S Serial
Audio Interface Formats
System Features
Power-down Mode
+5 V Analog Power Supply, Nominal
+3.3 V Digital Power Supply, Nominal
Direct Interface with 3.3 V to 5 V Logic Levels
Pin Compatible with CS5345 (*See Section 2
for details.)
General Description
The CS5346 integrates an analog multiplexer, program-
mable gain amplifier, and stereo audio analog-to-digital
converter. The CS5346 performs stereo analog-to-digi-
tal (A/D) conve rsion of 24-bit serial values at sa mple
rates up to 192 kHz.
A 6:1 stereo input multiplexer is included for selecting
between line-level and microphone-level inputs. The
microphone input path includes a +32 dB gain stage
and a low-noise bias voltage supply. The PGA is avail-
able for line or microphone inputs and provides
gain/attenuation of ±12 dB in 0.5 dB steps.
The output of the PGA is followed by an advanced 5th-
order, multi-bit delta-sigma modulator and digital filter-
ing/decimation. Sampled data is transmitted by the
serial audio interface at rates from 8 kHz to 192 kHz in
either Slave or Master Mode.
Integrated level translators allow easy interfacing be-
tween the CS5346 and other devices operating over a
wide range of logic levels.
The CS5346 is available in a 48-pin LQFP package in
Commercial (-40° to +85° C) grade. The CDB5346 Cus-
tomer Demonstration board is also available for device
evaluation and implementation suggestions. Please re-
fer to “Ordering Information” on page 38 for complete
details.
3.3 V to 5 V
I²C/SPI
Control Data
Interrupt
Overflow
Reset
Serial
Audio
Output
3.3 V
Register Configuration
High Pass
Filter
Low-Latency
Anti-Alias Filter
High Pass
Filter
Low-Latency
Anti-Alias Filter
5V
Internal Voltage
Reference
Multibit
Oversampling
ADC
Multibit
Oversampling
ADC
PGA
MUX
PGAA
+32 dB
+32 dB
Left PGA Output
Right PGA Output
Stereo Input 1
Stereo Input 2
Stereo Input 3
Stereo Input 4 /
Mic Input 1 & 2
Stereo Input 5
Stereo Input 6
Preliminary Product Information
This document contains information for a product under development.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2012
(All Rights Reserved)
AUG ‘12
DS861PP3




CS5346 pdf, 반도체, 판매, 대치품
CS5346
LIST OF TABLES
Table 1. Speed Modes .............................................................................................................................. 19
Table 2. Common Clock Frequencies ....................................................................................................... 19
Table 3. Slave Mode Serial Bit Clock Ratios ............................................................................................. 20
Table 4. Device Revision .......................................................................................................................... 28
Table 5. Freeze-able Bits .......................................................................................................................... 28
Table 6. Functional Mode Selection .......................................................................................................... 29
Table 7. Digital Interface Formats ............................................................................................................. 29
Table 8. MCLK Frequency ........................................................................................................................ 30
Table 9. PGAOut Source Selection ........................................................................................................... 30
Table 10. Example Gain and Attenuation Settings ................................................................................... 31
Table 11. PGA Soft Cross or Zero Cross Mode Selection ........................................................................ 32
Table 12. Analog Input Multiplexer Selection ............................................................................................ 32
4 DS861PP3

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CS5346 전자부품, 판매, 대치품
CS5346
2. PIN COMPATIBILITY - CS5345/CS5346 DIFFERENCES
The CS5346 is p in compatible with the CS5345 and is a drop in replacement for CS5345 applications where
VA = 5 V, VD = 3.3 V, VLS 3.3 V, and VLC 3.3 V. The pinout diagram and table below show the requirements
for the remaining pins when replacing the CS5345 in these designs with a CS5346.
48 47 46 45 44 43 42 41 40 39 38 37
SDA/CDOUT
SCL/CCLK
AD0/CS
AD1/CDIN
VLC
RST
AIN3A
AIN3B
AIN2A
AIN2B
AIN1A
AIN1B
1
2
3
4
5
6
7
8
9
10
11
12
CS5345
Compatibility
36 VLS
35 TSTO
34 NC
33 NC
32 AGND
31 AGND
30 VA
29 PGAOUTB
28 PGAOUTA
27 AIN6B
26 AIN6A
25 MICBIAS
13 14 15 16 17 18 19 20 21 22 23 24
CS5345
# Pin Name
5 VLC
14 VA
18 TSTO
20 TSTI
30 VA
31 AGND
35 TSTO
36 VLS
37 TSTI
46 VD
CS5346
Pin Name
VLC
VA
VQ
NC
NC
NC
NC
VLS
NC
VD
CS5346
Connection for Compatibility
Control Port Power (Input) -Limited to nominal 5 or 3.3 V.
Analog Power (Input) - Limited to nominal 5 V.
This pin must be left unconnected.
This pin should be tied to ground.
This pin may be connected to the analog supply voltage. The decoupling capacitor for the
CS5345 is not required.
This pin should be connected to ground.
This pin may be left unconnected.
Serial Audio Interface Power (Input) - Limited to nominal 5 or 3.3 V.
This pin should be tied to ground.
Digital Power (Input) - Limited to nominal 3.3 V
DS861PP3
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