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QN9020 데이터시트 PDF




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부품번호 QN9020 기능
기능 Ultra Low Power BLE System-on-Chip Solution
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QN9020 데이터시트, 핀배열, 회로
QN902X
Ultra Low Power BLE System-on-Chip Solution
Rev. 1.1 — 10 February 2015
Product data sheet
1. Introduction
QN902x is an ultra-low power wireless System-on-Chip (SoC) for Bluetooth Smart
applications, supporting both master and slave modes. It integrates a high performance
2.4 GHz RF transceiver with a 32-bit ARM Cortex-M0 MCU, Flash memory, and analog
and digital peripherals.
By integrating a Bluetooth v4.0 Low Energy compliant radio, link controller and host
stack, QN902x provides a single chip solution for Bluetooth Smart applications. The 32-
bit ARM Cortex-M0 MCU and on-chip memory provide additional signal processing and
room to run applications for a true single-chip Bluetooth Smart solution. In addition,
QN902x can also be utilized as a network processor by connecting to an application
processor via UART or SPI to add Bluetooth Smart feature to any products.
QN902x comes with complete analog peripherals and digital interfaces to enable easy
connection to any analog or digital peripherals or sensors, and external application
processor in network processor mode.
2. General description
QN902x is an ultra-low power, high performance and highly integrated Bluetooth v4.0
Low Energy (BLE) solution for Bluetooth Smart applications such as sports/fitness,
human interface devices, and app-enabled smart accessories. It is especially designed
for wearable electronics and can run on small capacity battery such as a coin cell battery.
QN902x integrates a BLE radio, controller, protocol stack and profile software on a single
chip, providing a flexible and easy to use BLE SoC solution. It also includes a high
performance MCU and on-chip memory that can support users to develop a single-chip
wireless MCU solution. Users can also utilize QN902x as a network processor by
connecting to an application processor for more advanced applications.
Additional system features include fully integrated DC/DC and LDO, low power sleep
timer, battery monitor, general purpose ADC, and GPIOs, to further reduce overall
system cost and size. QN902x operates with a power supply range of
2.4 V to 3.6 V and has very low power consumption in all modes, enabling long lifetimes
in battery-operated systems while maintaining excellent RF performance.




QN9020 pdf, 반도체, 판매, 대치품
NXP Semiconductors
6. Block diagram
QN902X
Ultra Low Power BLE System-on-Chip Solution
SWD
DEBUG
INTERFACE
ARM
CORTEX-M0
GPIO ports
P0/1/2/3
GPIO
XTAL1/2
VCC
TIMER0
TIMER1
TIMER2
TIMER3
RTC
WDT
IOCONFIG
SYSTEM
CLOCK
PMU
DMA
QN902x
System Memory
64kB
AHB-LITE BUS
AHB to APB BRIDGE
ROM
ADC
AES-128
UART0
UART1
SPI0
SPI1
I2C
TEMP
BATTERY
ACMP0
ACMP1
RADIO
PWM
AIN0/1/2/3
RXD0/TXD0/CTS0/RTS0
RXD0/TXD0/CTS0/RTS0
SPICLK0/nCS0/DIN0/DAT0
SPICLK1/nCS1/DIN1/DAT1
SCL/SDA
ACMP0+/-
ACMP1+/-
RFN/RFP
PWM0/1
Fig 1. Block diagram
QN902X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 February 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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QN9020 전자부품, 판매, 대치품
NXP Semiconductors
QN902X
Ultra Low Power BLE System-on-Chip Solution
Symbol
Pin Alt Function
QN9020 QN9021
Description
VSS
12 8
Ground
VDD
13 9
Power supply
P1_7
14
10
0: P1_7 (I/O)
P1_7: GPIO15
1: RXD0 (I)
RXD0: UART0 Rx data input
2: DIN0 (I)
DIN0: SPI0 input data in 4-wire mode, invalid in 3-wire
mode
3: T0_0 (O)
T0_0: Timer 0 PWM output
P1_6
15
0: P1_6 (I/O)
P1_6: GPIO14
1: nCS0 _1 (O) nCS0_1: SPI0 slave select output for master mode
2: PWM0 (O)
PWM0: PWM0 output
3: T0_3 (I/O)
T0_3: Timer 0 input capture /clock or PWM output
P1_5
16
0: P1_5 (I/O)
P1_5: GPIO13
1: PWM1 (O)
PWM1: PWM1 output
2: T1_2 (I/O)
T1_2: Timer 1 input capture /clock or PWM output
P1_4
17
0: P1_4 (I/O)
P1_4: GPIO12
1: T1_3 (I/O)
T1_3: Timer 1 input capture /clock or PWM output
P1_3
18
11
0: P1_3 (I/O)
P1_3: GPIO11
1: SPICLK1 (I/O) SPICLK1: SPI1 clock
2: RTS1 (O)
RTS1: UART1 RTS
3: CLKOUT1 (O) CLKOUT1: Clock output 1
P1_2
19
12
0: P1_2 (I/O)
P1_2: GPIO10
1: nCS1_0 (I/O) nCS1_0: SPI1 slave select for master/slave mode
2: CTS1 (I)
CTS1: UART1 CTS
3: ADCT (AI)
ADCT: ADC conversion external trigger
P1_1
20
13
0: P1_1 (I/O)
P1_1: GPIO9
1: DAT1 (I/O)
DA1: In 4-wire mode, SPI1 output data. In 3-wire mode,
data I/O
2: TXD1 (O)
3: T1_0 (I/O)
TXD1: UART1 Tx data
T1_0: Timer 1 input capture /clock or PWM output
P1_0
21
14
0: P1_0 (I/O)
P1_0: GPIO8.
1: DIN1 (I)
DIN1: SPI1 input data in 4-wire mode, invalid in 3-wire
mode
2: RXD1 (I)
RXD1: UART1 Rx data
3: T2_ECLK (I/O) T2_ECLK: Timer 2 external clock input or PWM output
P2_7
22
15
0: P2_7 (I/O)
P2_7: GPIO23.
1: ACMP1_O (O) ACMP1_O: Analog comparator result output
2: PWM0 (O)
PWM0: PWM0 output
3: T1_ECLK (I/O) T1_ECLK: Timer 1 external clock input or PWM output
QN902X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 February 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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