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MT29F1G08ABAEAH4-IT PDF 데이터시트 ( Data , Function )

부품번호 MT29F1G08ABAEAH4-IT 기능
기능 NAND Flash Memory
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MT29F1G08ABAEAH4-IT 데이터시트, 핀배열, 회로
Micron Confidential and Proprietary
Preliminary
1Gb x8, x16: NAND Flash Memory
Features
NAND Flash Memory
MT29F1G08ABAEAWP-IT, MT29F1G08ABAEAWP, MT29F1G08ABAEAH4-IT
MT29F1G08ABAEAH4, MT29F1G08ABBEAH4-IT, MT29F1G08ABBEAH4,
MT29F1G16ABBEAH4-IT, MT29F1G16ABBEAH4, MT29F1G08ABBEAHC-IT,
MT29F1G08ABBEAHC, MT29F1G16ABBEAHC-IT, MT29F1G16ABBEAHC
Features
• Open NAND Flash Interface (ONFI) 1.0-compliant1
• Single-level cell (SLC) technology
• Organization
– Page size x8: 2112 bytes (2048 + 64 bytes)
– Page size x16: 1056 words (1024 + 32 words)
– Block size: 64 pages (128K + 4K bytes)
– Device size: 1Gb: 1024 blocks
• Asynchronous I/O performance
tRC/tWC: 20ns (3.3V), 25ns (1.8V)
• Array performance
– Read page: 25µs
– Program page: 200µs (TYP, 3.3V and 1.8V)
– Erase block: 700µs (TYP)
• Command set: ONFI NAND Flash Protocol
• Advanced command set
– Program page cache mode
– Read page cache mode
– One-time programmable (OTP) mode
– Read unique ID
– Internal data move
– Block lock (1.8V only)
• Operation status byte provides software method for
detecting
– Operation completion
– Pass/fail condition
– Write-protect status
• Internal data move operations supported within the
device from which data is read
• Ready/busy# (R/B#) signal provides a hardware
method for detecting operation completion
• WP# signal: write protect entire device
• First block (block address 00h) is valid when ship-
ped from factory with ECC. For minimum required
ECC, see Error Management.
• Block 0 requires 1-bit ECC if PROGRAM/ERASE cy-
cles are less than 1000
• RESET (FFh) required as first command after pow-
er-on
• Alternate method of device initialization (Nand_In-
it) after power up3 (contact factory)
• Quality and reliability
– Data retention: 10 years
– Endurance: 100,000 PROGRAM/ERASE cycles
• Operating Voltage Range
– VCC: 2.7–3.6V
– VCC: 1.7–1.95V
• Operating temperature:
– Commercial: 0°C to +70°C
– Industrial (IT): –40ºC to +85ºC
• Package
– 48-pin TSOP type 1, CPL2
– 63-ball VFBGA
Notes:
1. The ONFI 1.0 specification is available at
www.onfi.org.
2. CPL = Center parting line.
3. Available only in the 1.8V VFBGA package.
PDF: 09005aef847d5585
m68m_non_ecc.pdf – Rev. E 7/12 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.




MT29F1G08ABAEAH4-IT pdf, 반도체, 판매, 대치품
Micron Confidential and Proprietary
Preliminary
1Gb x8, x16: NAND Flash Memory
Features
LOCK (2Ah) ................................................................................................................................................ 65
LOCK TIGHT (2Ch) ..................................................................................................................................... 66
BLOCK LOCK READ STATUS (7Ah) .............................................................................................................. 67
One-Time Programmable (OTP) Operations .................................................................................................... 69
OTP DATA PROGRAM (80h-10h) ................................................................................................................. 70
RANDOM DATA INPUT (85h) ...................................................................................................................... 71
OTP DATA PROTECT (80h-10) ..................................................................................................................... 72
OTP DATA READ (00h-30h) ......................................................................................................................... 74
Error Management ......................................................................................................................................... 76
Electrical Specifications .................................................................................................................................. 77
Electrical Specifications – AC Characteristics and Operating Conditions ........................................................... 79
Electrical Specifications – DC Characteristics and Operating Conditions ........................................................... 82
Electrical Specifications – Program/Erase Characteristics ................................................................................. 84
Asynchronous Interface Timing Diagrams ....................................................................................................... 85
Revision History ............................................................................................................................................. 95
Rev. E, Preliminary – 7/12 ............................................................................................................................ 95
Rev. D, Preliminary – 2/12 ........................................................................................................................... 95
Rev. C, Preliminary – 2/12 ........................................................................................................................... 95
Rev. B, Preliminary – 11/11 .......................................................................................................................... 95
Rev. A, Preliminary – 08/11 .......................................................................................................................... 95
PDF: 09005aef847d5585
m68m_non_ecc.pdf – Rev. E 7/12 EN
4 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.

4페이지










MT29F1G08ABAEAH4-IT 전자부품, 판매, 대치품
Micron Confidential and Proprietary
Preliminary
1Gb x8, x16: NAND Flash Memory
Features
Figure 51: PROGRAM/ERASE Issued to Locked Block ...................................................................................... 67
Figure 52: BLOCK LOCK READ STATUS .......................................................................................................... 67
Figure 53: BLOCK LOCK Flowchart ................................................................................................................ 68
Figure 54: OTP DATA PROGRAM (After Entering OTP Operation Mode) ........................................................... 71
Figure 55: OTP DATA PROGRAM Operation with RANDOM DATA INPUT (After Entering OTP Operation Mode) .7..2
Figure 56: OTP DATA PROTECT Operation (After Entering OTP Protect Mode) ................................................. 73
Figure 57: OTP DATA READ ........................................................................................................................... 74
Figure 58: OTP DATA READ with RANDOM DATA READ Operation ................................................................. 75
Figure 59: RESET Operation ........................................................................................................................... 85
Figure 60: READ STATUS Cycle ...................................................................................................................... 85
Figure 61: READ PARAMETER PAGE .............................................................................................................. 86
Figure 62: READ PAGE ................................................................................................................................... 86
Figure 63: READ PAGE Operation with CE# “Don’t Care” ................................................................................ 87
Figure 64: RANDOM DATA READ ................................................................................................................... 88
Figure 65: READ PAGE CACHE SEQUENTIAL ................................................................................................. 89
Figure 66: READ PAGE CACHE RANDOM ....................................................................................................... 90
Figure 67: READ ID Operation ....................................................................................................................... 91
Figure 68: PROGRAM PAGE Operation ........................................................................................................... 91
Figure 69: PROGRAM PAGE Operation with CE# “Don’t Care” ......................................................................... 92
Figure 70: PROGRAM PAGE Operation with RANDOM DATA INPUT ............................................................... 92
Figure 71: PROGRAM PAGE CACHE ............................................................................................................... 93
Figure 72: PROGRAM PAGE CACHE Ending on 15h ......................................................................................... 93
Figure 73: INTERNAL DATA MOVE ................................................................................................................ 94
Figure 74: ERASE BLOCK Operation ............................................................................................................... 94
PDF: 09005aef847d5585
m68m_non_ecc.pdf – Rev. E 7/12 EN
7 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.

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MT29F1G08ABAEAH4-IT

NAND Flash Memory

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