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PDF MKV31F256VLH12 Data sheet ( Hoja de datos )
| Número de pieza | MKV31F256VLH12 | |
| Descripción | KV31F Sub-Family Reference Manual | |
| Fabricantes | Freescale Semiconductor | |
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KV31F Sub-Family Reference Manual
Supports: MKV31F256VLL12, MKV31F256VLH12
Document Number: KV31P100M120SF8RM
Rev. 3, 7/2014
1 page  
Section number
Title
Page
3.6.2 RNG Configuration......................................................................................................................................84
3.7 Analog...........................................................................................................................................................................85
3.7.1 16-bit SAR ADC Configuration..................................................................................................................85
3.7.2 CMP Configuration......................................................................................................................................92
3.7.3 12-bit DAC Configuration...........................................................................................................................94
3.7.4 VREF Configuration....................................................................................................................................96
3.8 Timers...........................................................................................................................................................................97
3.8.1 PDB Configuration......................................................................................................................................97
3.8.2 FlexTimer Configuration.............................................................................................................................100
3.8.3 PIT Configuration........................................................................................................................................106
3.8.4 Low-power timer configuration...................................................................................................................107
3.9 Communication interfaces............................................................................................................................................109
3.9.1 SPI configuration.........................................................................................................................................109
3.9.2 I2C Configuration........................................................................................................................................112
3.9.3 UART Configuration...................................................................................................................................113
3.9.4 LPUART configuration................................................................................................................................116
3.10 Human-machine interfaces...........................................................................................................................................116
3.10.1 GPIO configuration......................................................................................................................................117
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................119
4.2 System memory map.....................................................................................................................................................119
4.2.1 Aliased bit-band regions..............................................................................................................................120
4.2.2 Flash Access Control Introduction...............................................................................................................122
4.3 Flash Memory Map.......................................................................................................................................................122
4.3.1 Alternate Non-Volatile IRC User Trim Description....................................................................................123
4.4 SRAM memory map.....................................................................................................................................................123
4.5 Peripheral bridge (AIPS-Lite) memory map.................................................................................................................123
4.5.1 Read-after-write sequence and required serialization of memory operations..............................................124
KV31F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
5
5 Page 
Section number
Title
Page
12.2.17 Unique Identification Register Mid-High (SIM_UIDMH)..........................................................................248
12.2.18 Unique Identification Register Mid Low (SIM_UIDML)...........................................................................249
12.2.19 Unique Identification Register Low (SIM_UIDL)......................................................................................249
12.3 Functional description...................................................................................................................................................249
Chapter 13
Kinetis Flashloader
13.1 Chip-Specific Information............................................................................................................................................251
13.2 Introduction...................................................................................................................................................................251
13.3 Functional Description..................................................................................................................................................253
13.3.1 Memory Maps..............................................................................................................................................253
13.3.2 Kinetis Flashloader......................................................................................................................................253
13.3.3 Start-up Process............................................................................................................................................254
13.3.4 Clock Configuration.....................................................................................................................................254
13.3.5 Flashloader Protocol....................................................................................................................................255
13.3.6 Flashloader Packet Types.............................................................................................................................259
13.3.7 Flashloader Command API..........................................................................................................................266
13.3.8 Flashloader Exit state...................................................................................................................................284
13.4 Peripherals Supported...................................................................................................................................................286
13.4.1 I2C Peripheral..............................................................................................................................................286
13.4.2 SPI Peripheral..............................................................................................................................................287
13.4.3 UART Peripheral.........................................................................................................................................289
13.5 Get/SetProperty Command Properties..........................................................................................................................292
13.5.1 Property Definitions.....................................................................................................................................293
13.6 Kinetis Flashloader Status Error Codes........................................................................................................................295
Chapter 14
Reset Control Module (RCM)
14.1 Introduction...................................................................................................................................................................297
14.2 Reset memory map and register descriptions...............................................................................................................297
14.2.1 System Reset Status Register 0 (RCM_SRS0)............................................................................................298
KV31F Sub-Family Reference Manual , Rev. 3, 7/2014
Freescale Semiconductor, Inc.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MKV31F256VLH12.PDF ] | |
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