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부품번호 | F21NM50N 기능 |
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기능 | STF21NM50N | ||
제조업체 | STMicroelectronics | ||
로고 | |||
전체 18 페이지수
STP/F21NM50N - STW21NM50N
STB21NM50N - STB21NM50N-1
N-channel 500V - 0.15Ω - 18A TO-220/FP/D2/I2PAK/TO-247
Second generation MDmesh™ Power MOSFET
General features
Type
VDSS
(@Tjmax)
RDS(on)
ID
STB21NM50N
)STB21NM50N-1
t(sSTF21NM50N
cSTP21NM50N
uSTW21NM50N
550V
550V
550V
550V
550V
< 0.19Ω
< 0.19Ω
< 0.19Ω
< 0.19Ω
< 0.19Ω
18A
18A
18A(1)
18A
18A
rod1. Limited by wire bonding
P■ 100% avalanche tested
te■ Low input capacitance and gate charge
le■ Low gate input resistance
bsoDescription
- OThe devices are realized with the second
)generation of MDmesh Technology. This
t(srevolutionary Power MOSFET associates a new
cvertical structure to the company's strip layout to
uyield one of the world's lowest on-resistance and
dgate charge. It is therefore suitable for the most
rodemanding high efficiency converters
te PApplications
Obsole■ Switching application
3
2
1
TO-220
3
2
1
TO-220FP
3
1
D2PAK
123
I2PAK
TO-247
Internal schematic diagram
Order codes
Part number
STB21NM50N
STB21NM50N-1
STF21NM50N
STP21NM50N
STW21NM50N
Marking
B21NM50N
B21NM50N
F21NM50N
P21NM50N
W21NM50N
Package
D2PAK
I2PAK
TO-220FP
TO-220
TO-247
Packaging
Tape & reel
Tube
Tube
Tube
Tube
January 2007
Rev 6
1/18
www.st.com
18
Electrical characteristics
STP/F21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
2 Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 4. On/off states
Symbol
Parameter
Test conditions
Value
Unit
Min. Typ. Max.
Drain-source
V(BR)DSS breakdown voltage
ID = 1mA, VGS = 0
500
V
t(s)dv/dt(1)
Drain source voltage slope
VDD=400V, ID=25A,
VGS=10V
44 V/ns
ucIDSS
Zero gate voltage
drain current (VGS = 0)
VDS = Max rating
VDS = Max rating,TC@125°C
1 µA
10 µA
rodIGSS
Gate-body leakage
current (VDS = 0)
VGS = ± 20V
100 nA
PVGS(th) Gate threshold voltage
VDS = VGS, ID = 250µA
2 3 4V
leteRDS(on
Static drain-source on
resistance
VGS = 10V, ID = 9A
0.150 0.190 Ω
so1. Characteristic value at turn off on inductive load
- ObTable 5. Dynamic
t(s)Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
cgfs (1)
duCiss
roCoss
PCrss
Forward transconductance VDS = 15V, ID = 9A
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25V, f = 1 MHz,
VGS = 0
12
1950
420
60
S
pF
pF
pF
leteCoss
(2)
eq.
Equivalent output
capacitance
VGS = 0V, VDS = 0V to 400V
270
pF
so td(on)
b tr
O td(off)
Turn-on delay time
Rise time
Turn-off delay time
VDD =250V, ID = 9A
RG = 4.7Ω VGS = 10V
(see Figure 15.)
22 ns
18 ns
90 ns
tf Fall time
30 ns
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD = 400V, ID = 18A,
VGS = 10V,
(see Figure 16.)
65 nC
10 nC
30 nC
f=1MHz Gate DC Bias=0
Rg Gate input resistance
test signal level=20mV
open drain
1.6 Ω
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
4/18
4페이지 STP/F21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Electrical characteristics
Figure 7. Transconductance
Figure 8. Static drain-source on resistance
uct(s)Figure 9. Gate charge vs gate-source voltage Figure 10. Capacitance variations
roduct(s) - Obsolete ProdFigure 11. Normalized gate threshold voltage Figure 12. Normalized on resistance vs
Obsolete Pvs temperature
temperature
7/18
7페이지 | |||
구 성 | 총 18 페이지수 | ||
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |