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Número de pieza | MYXFC32GJDDQ | |
Descripción | MMC Controller & NAND Flash | |
Fabricantes | micross | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MYXFC32GJDDQ (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
No Preview Available ! Micron Confidential and Proprietary
MMC C4oGnBt,r8oGllBMe,rY1&X6GFNCBA,3N322GDGJBFDF:leDaeas·QMthu*MreCs
e·MMC™ Memory *Advanced information. Subject to change without notice.
MTFC4GLDDQ-4MMMIT,CMCToFnCt8rGoLllDeDr Qan-4dM3I2TGB NAND Flash
MTFFCe1at6uGreJsDDQ-4M IT, MTFC32GJDDQ-4M IT
Feat•u rTien-lsead ball metallurgy
• MultiMediaCard (MMC) controller and 32GB NAND Flash
• Mult•i MVeCdC:ia2C.7a–r3d.6(VMMC) controller and NAND Flash
• 100-•b aVllCLCQB(GduAa(l RvooltHagSe)6: /16.6-5–1.95V; 2.7–3.6V
com•p liTaynptic)al current consumption
• VCC: 2.7–3.S6tVandby current: 90μA
• VCCQ (dualAvcotivletacguerr)e:n1t (.R6M5–S1):.9905mVA; 2.7–3.6V
• Industrial temperature ranges
– OMpeMraCtin-g StepmepceriafitcureF:e–4a0t˚uCrteos+85˚C
– Storage temperature: –40˚C to +85˚C
• Typi•c alJcEuDrErCe/nMtMcConstsaunmdaprdtivoenrsion 4.41-compliant (JEDEC
– StanSdtbanydcaurdrrNeon. t8:47-0Aμ44A1()4-GSPBI,m8oGdBe)n; o9t0sµuApp(o1r6teGd B,
32GB(se)e www.jedec.org/sites/default/files/docs/JESD84-A441.pdf)
– Active cAudrvraenncted(R1M1-sSig)n: a7l0inmterAfa(c4eGB, 8GB); 90mA
(16GB, 3x21,GxB4,)and x8 I/Os, selectable by host
MMC mode operation
MMC-SpeCcoimfmicanFdeclaastseus:rcelasss 0 (basic); class 2 (block read);
class 4 (block write); class 5 (erase); class 6 (write
• JEDEC/MMproCtescttaionn)d; calradssv7e(rlosciok nca4rd.)41-compliant
(JEDECS taMnMdCaprldusN™oa.n8d4M-AM4C4m1o)b–ileS™PIprmotoocdoels not
supportedT(esmepeowrarwy wwr.ijteedperocte.octriogn/sites/default/files/
docs/JESD5824M-AH4z4c1lo.cpkdsfp)eed (MAX)
– AdvanceBdoo1t 1o-pseirgatnioanl(ihnigthe-rsfpaecede boot)
– x1, x4, aSnledepx8mIo/dOe s, selectable by host
– MMCmRoedpleayo-pproetreacttieodnmemory block (RPMB)
– Comm aSnedcucrelaesrassees:ancdlatsrism0 (basic); class 2 (block
read);clHaasrsdw4a(rbe lroescekt swigrniatle); class 5 (erase);
class6 (Mwurlititpeleppraorttiteiocntsiownith);ecnlhaasnsce7d(alottrcibkucteard)
– MMCp lPuesr™maanenndt aMndMpoCwmero-obnilwer™ite pprrootetcoticoonls
– Tempo rDaoruybwlerdiatetaprartoet(eDcDtRio) fnunction
– 52 MH zHcigloh-cpkriosrpityeeindter(rMupAt (XHP) I)
– Boot opEenrhaatniocend(rheliiagbhle-swpriteeed boot)
– SleepmCoodnefigurable reliability settings
– Replay -pBarcoktgercotuend ompeermatioonry block (RPMB)
– Secure eFruallysenahnandcetrdimconfigurable
– Hardw aBreacrkewsaerdt -sciogmnpaaltible with previous MMC modes
– M•u ltEiCpCleapnadrbtiloticoknmsawnaigthemeennht aimnpcleemdeanttterdibute
– Permanent and power-on write protection
– Double data rate (DDR) function
– HMiYgXhFC-3p2rGiJoDrDiQty interrupt (HPI)
Revision 1.0 - 11/26/2014
FFigiguruer1e: e1·:MMMCicDreovnicee·MMC Device
MMC
power
MMC controller
MMC
interface
NAND Flash
power
NAND Flash
MMC-Specific Features (Continued)
––OptECiononhnsafingcuerdabrleeliraeblilaebwilritityesettings Marking
–• BPaacckkgargoeu(Snnd63opPbe3ra7tsioolnder)
–
–
FBmuaoclldky1(ew10es40anm-rhbmdaa-lxlncL1ocF8emBmdGpmAcaoxtni1b.f4liegmuwmr)iatbhleprevious MMBCG
• E•C COapnerdatbinlgoTcekmmpearantaurgeement implemented
Industrial (-40°C ≤ TC ≤ +85°C)
IT
1
Form #: CSI-D-685 Document 013
1 page MMC Controller & NAND Flash
Micron Confidential and Proprietary
MYXFC32GJDDQ*
4 100-Ball Signal Assignments
100-Ball Signal Assignments
Figure 3: 1Fi0g0u-rBea2ll:L1F0B0G-BAa(lTl oLpFBVGieAw(T,oBpaVllieDwo,wBna)ll Down)
4G*BAd,va8nGcedBi,nf1or6mGatiBon,. S3u2bjGectBto: ceha·MngeMwiCthout notice.
100-Ball Signal Assignments
1 2 3 4 5 6 7 8 9 10
A NC NC
NC NC
A
B NC
NC B
D RFU RFU RFU RFU RFU RFU RFU RFU
E RFU RFU VDDIM RFU RFU RFU RFU RFU
F VCC VCC VCC VCC VCC VCC VCC VCC
G VSS VSS VSS VSS VSS VSS VSS VSS
H
VSSQ
VCCQ
RFU
RFU
RFU
RFU
VCCQ
VSSQ
J RFU RFU RFU RFU RFU RFU RFU RFU
K DAT0 DAT2 RFU RFU RFU RFU DAT5 DAT7
L
VCCQ
VSSQ
VCCQ
RFU
RFU
VCCQ
VSSQ
VCCQ
M RFU RFU VSSQ RST_n RFU VSSQ RFU RFU
N DAT1 DAT3 RFU RFU RFU RFU DAT4 DAT6
P
VSSQ
VCCQ
RFU
CMD
CLK
RFU
VCCQ
VSSQ
D
E
F
G
H
J
K
L
M
N
P
T NC
NC T
U NC NC
NC NC
U
Notes: Notes: 1. Connect a 1μF decoupling capacitor from VDDI to ground.
1. Connect a 1μF2.dScerocomonueipntteliensrtgnpacaladupssaeocnoitntohlyre. fdroemviceVDaDreI tnoogt rsohuowndn.. They are not solder balls and are for Mi-
2. Some test pad3s. oSonmtheeprdeevvioicues vaerersinoonts sohf othwenJ.ETDhECeypraoreduncot tosr omldecehrabnaicllasl aspnedciafirceatfioorninhtaedrndaelfiunseed only.
3. Some previous verveirosseuiorsvnsespdeocfofifrtihcfaeuttiJouEnresDucEosCeul(dpRFrhoUad)vuebcabtlelsoearnsmcnoeoncnchoeanctnneiecdcattlo(sNgpCre)ocbuianfildclsa.otNnioCtnhbehaalslydssatdessemigfinbneoedadridrne. stTheoerevpnerade--for future
use (RFU) balls asblneonecwonfenaetcutre(NinCt)robdaullcst.ioNnC, sobmalelsoafstshiegsneebdalilns athreeapsrseigvnioeudsasspRFeUcifiincathtieonv4s.4comuel-d have
been connected ctohagnriocaulnsdpeocinficthateiosny.sAtenmy nbeowaPrdCB. Tfoooetnparibntleimnepwlemfeeanttuarteioinnstrsohdouulcdtiuosne, tshoemneewofbtahllese balls
are
use
assigned
the new
ba4as.llRaVasFsCsCUsi,gigVninnCmCmteQhn,eeVtnsvStSas4,n.aa4dnnldmdeaVelevSceSahQvtahebneatilchRlsaeFmlURsubpFsateUlclasbliflfiaclbolaelasttcioifonlonnga.notAeinncntgteyhdone.neswytshtePemCsyBbsotfeaormodt.pbroinatrdim. plementations
should
4. VCC, VCCQ, VSS, and VSSQ balls must all be connected.
PDF: 09005aef8523caab
MYXFC32GJDDQemmc_4-32gb_ctrd_441_100b-it.pdf - Rev. B 9/13 EN
Revision 1.0 - 11/26/2014
6 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.
5
Form #: CSI-D-685 Document 013
5 Page MMC Controller & NAND Flash
MYXFC32GJDDQ*
9 ECSD Register
*Advanced information. Subject to change without notice.
The 512-byte extended card-specific data (ECSD) register defines device properties and selected modes. The
most significant 320 bytes are the properties segment. This segment defines device capabilities and cannot
be modified by the host. The lower 192 bytes are the modes segment. The modes segment defines the
configuration in which the device is working. The host can change the properties of modes segments using the
SWITCH command.
Table 5: ECSD Register Field Parameters
Name
Field
Properties Segment
Reserved2
–
Supported command sets
S_CMD_SET
HPI features
HPI_FEATURES
Background operations support
BKOPS_SUPPORT
Reserved
–
Background operations status
BKOPS_STATUS
Number of correctly programmed sectors
CORRECTLY_PRG_SECTORS_NUM
First initialization time after partitioning (first CMD1
to device ready)
INI_TIMEOUT_PA
Reserved
–
Power class for 52 MHz, DDR at 3.6V3
PWR_CL_DDR_52_360
Power class for 52 MHz, DDR at 1.95V3
PWR_CL_DDR_52_195
Reserved
–
Minimum write performance for 8-bit at 52 MHz in
DDR mode
MIN_PERF_DDR_W_8_52
Minimum read performance for 8-bit at 52 MHz in
DDR mode
MIN_PERF_DDR_R_8_52
Reserved
–
TRIM multiplier
TRIM_MULT
Secure feature support
SEC_FEATURE_SUPPORT
SECURE ERASE multiplier
SEC_ERASE_MULT
SECURE TRIM multiplier
SEC_TRIM_MULT
Boot information
BOOT_INFO
Reserved
–
Boot partition size
BOOT_SIZE_MULT
Size (Bytes)
7
1
1
1
255
1
4
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
Cell Type1
–
R
R
R
–
R
R
R
–
R
R
–
R
R
–
R
R
R
R
R
–
R
ECSD Bits ECSD Value
[511:505]
504
503
502
[501:247]
246
[245:242]
241
240
239
238
[237:236]
235
234
233
232
231
230
229
228
227
226
–
1h
3h
1h
–
0h
–
FFh
–
0h
0h
–
0h
0h
–
0Fh
15h
06h
09h
7h
–
80h
MYXFC32GJDDQ
Revision 1.0 - 11/26/2014
11
Form #: CSI-D-685 Document 013
11 Page |
Páginas | Total 18 Páginas | |
PDF Descargar | [ Datasheet MYXFC32GJDDQ.PDF ] |
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