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ST7LITE35F2 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ST7LITE35F2
기능 8-BIT MCU
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ST7LITE35F2 데이터시트, 핀배열, 회로
ST7LITE3xF2
8-bit MCU with single voltage Flash, data EEPROM, ADC, timers,
SPI, LINSCI
Features
Memories
– 8 Kbytes program memory: single voltage ex-
tended Flash (XFlash) Program memory with
read-out protection, In-Circuit Programming
and In-Application programming (ICP and
IAP), data retention: 20 years at 55°C.
– 384 bytes RAM
– 256 bytes data EEPROM with read-out pro-
tection. 300K write/erase cycles guaranteed,
data retention: 20 years at 55°C.
Clock, Reset and Supply Management
– Enhanced reset system
– Enhanced low voltage supervisor (LVD) for
main supply and an auxiliary voltage detector
(AVD) with interrupt capability for implement-
ing safe power-down procedures
– Clock sources: Internal RC 1% oscillator,
crystal/ceramic resonator or external clock
– Optional x4 or x8 PLL for 4 or 8 MHz internal
clock
– Five Power Saving Modes: Halt, Active-Halt,
Wait and Slow, Auto Wake Up From Halt
I/O Ports
– Up to 15 multifunctional bidirectional I/O lines
– 7 high sink outputs
5 Timers
– Configurable Watchdog Timer
– Two 8-bit Lite Timers with prescaler,
1 realtime base and 1 input capture
– Two 12-bit Auto-reload Timers with 4 PWM
outputs, input capture and output compare
functions
QFN20
SO20
DIP20
2 Communication Interfaces
– Master/slave LINSCIasynchronous serial
interface
– SPI synchronous serial interface
Interrupt Management
– 10 interrupt vectors plus TRAP and RESET
– 12 external interrupt lines (on 4 vectors)
A/D Converter
– 7 input channels
– 10-bit resolution
Instruction Set
8-bit data manipulation
– 63 basic instructions with illegal opcode
detection
– 17 main addressing modes
– 8 x 8 unsigned multiply instructions
Development Tools
– Full hardware/software development package
– DM (Debug module)
Table 1. Device summary
Features
Program memory - bytes
RAM (stack) - bytes
Data EEPROM - bytes
Peripherals
Operating Supply
CPU Frequency
Operating Temperature
Packages
ST7LITE30F2
ST7LITE35F2
ST7LITE39F2
8K
384 (128)
- - 256
Lite Timer, Autoreload Timer, SPI, LINSCI, 10-bit ADC
2.7V to 5.5V
Up to 8Mhz
(w/ ext OSC up to 16MHz)
Up to 8Mhz (w/ ext OSC up to 16MHz
and int 1MHz RC 1% PLLx8/4MHz)
-40°C to +125°C
SO20 300”, DIP20, QFN20
Rev. 9
November 2007
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ST7LITE35F2 pdf, 반도체, 판매, 대치품
Table of Contents
16.2 LINSCI LIMITATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
17 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
To obtain the most recent version of this datasheet,
please check at www.st.com
Please also pay special attention to the Section “KNOWN LIMITATIONS” on page 169.
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ST7LITE35F2 전자부품, 판매, 대치품
ST7LITE3xF2
PIN DESCRIPTION (Cont’d)
Legend / Abbreviations for Table 2:
Type:
I = input, O = output, S = supply
In/Output level: CT= CMOS 0.3VDD/0.7VDD with input trigger
Output level: HS = 20mA high sink (on N-buffer only)
Port and control configuration:
– Input:
float = floating, wpu = weak pull-up, int = interrupt, ana = analog
– Output: OD = open drain, PP = push-pull
The RESET configuration of each pin is shown in bold which is valid as long as the device is in reset state.
Table 2. Device Pin Description
Level
Pin Name
Port / Control
Input
Main
Output Function
(after
reset)
Alternate Function
19 1 VSS 1)
20 2 VDD 1)
1 3 RESET
S
S
I/O CT
X
2 4 PB0/AIN0/SS I/O CT X
3 5 PB1/AIN1/SCK I/O CT
ei3
X
4
6
PB2/AIN2/
MISO
5
7
PB3/AIN3/
MOSI
6
8
PB4/AIN4/
CLKIN**
I/O CT
I/O CT
I/O CT
X
X ei2
XX
7 9 PB5/AIN5
I/O
8 10 PB6/AIN6/RDI I/O
CT
CT
X
ei2
X
9 11 PA7/TDO
I/O CT HS X X
Ground
Main power supply
X Top priority non maskable interrupt (active low)
ADC Analog Input 0 or SPI Slave Select
(active low)
X X X Port B0 Caution: No negative current injection
allowed on this pin. For details, refer to
section 13.2.2 on page 132
ADC Analog Input 1 or SPI Serial Clock
X
X
X
Port B1
Caution: No negative current injection
allowed on this pin. For details, refer to
section 13.2.2 on page 132
X
X
X Port B2
ADC Analog Input 2 or SPI Master In/
Slave Out Data
X
X
X Port B3
ADC Analog Input 3 or SPI Master Out
/ Slave In Data
X
X
X Port B4
ADC Analog Input 4 or External clock
input
X X X Port B5 ADC Analog Input 5
X X X Port B6 ADC Analog Input 6 or LINSCI Input
X X Port A7 LINSCI Output
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ST7LITE35F2

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