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STM32F401VD PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 STM32F401VD
기능 ARM Cortex-M4 32b MCU+FPU
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STM32F401VD 데이터시트, 핀배열, 회로
STM32F401xD STM32F401xE
ARM® Cortex®-M4 32b MCU+FPU, 105 DMIPS,
512KB Flash/96KB RAM, 11 TIMs, 1 ADC, 11 comm. interfaces
Datasheet - production data
Features
Core: ARM® 32-bit Cortex®-M4 CPU with
FPU, Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 84 MHz,
memory protection unit,
105 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1),
and DSP instructions
Memories
– up to 512 Kbytes of Flash memory
– up to 96 Kbytes of SRAM
Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
Power consumption
– Run: 146 µA/MHz (peripheral off)
– Stop (Flash in Stop mode, fast wakeup
time): 42 µA Typ @ 25C; 65 µA max
@25 °C
– Stop (Flash in Deep power down mode,
fast wakeup time): down to 10 µA @ 25 °C;
30 µA max @25 °C
– Standby: 2.4 µA @25 °C / 1.7 V without
RTC; 12 µA @85 °C @1.7 V
– VBAT supply for RTC: 1 µA @25 °C
1×12-bit, 2.4 MSPS A/D converter: up to 16
channels
General-purpose DMA: 16-stream DMA
controllers with FIFOs and burst support
Up to 11 timers: up to six 16-bit, two 32-bit
timers up to 84 MHz, each with up to four
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input, two watchdog
timers (independent and window) and a
SysTick timer
)%*$
WLCSP49 LQFP100 (14 × 14 mm)U(7FQ× F7PmNm48)
(3.06 x 3.06 mm) LQFP64 (10 × 10 mm)
UFBGA100
(7 × 7 mm)
Debug mode
– Serial wire debug (SWD) & JTAG
interfaces
– Cortex®-M4 Embedded Trace Macrocell™
Up to 81 I/O ports with interrupt capability
– Up to 78 fast I/Os up to 42 MHz
– All I/O ports are 5 V-tolerant
Up to 12 communication interfaces
– Up to 3 x I2C interfaces (SMBus/PMBus)
– Up to 3 USARTs (2 x 10.5 Mbit/s,
1 x 5.25 Mbit/s), ISO 7816 interface, LIN,
IrDA, modem control)
– Up to 4 SPIs (up to 42Mbit/s at
ffCulPl-Ud=up8le4xMI2HSz)t,oSaPcIh2ieavnedaSuPdIi3o
with muxed
class
accuracy via internal audio PLL or external
clock
– SDIO interface
– Advanced connectivity: USB 2.0 full-speed
device/host/OTG controller with on-chip
PHY
CRC calculation unit
96-bit unique ID
RTC: subsecond accuracy, hardware calendar
All packages
UFQFPN48,
(WLCSP49,
UFBGA100)
LaQreFEPC6O4/P10A0C,K®2
Table 1. Device summary
Reference
Part number
STM32F401xD
STM32F401CD,
STM32F401RD, STM32F401VD
STM32F401xE
STM32F401CE,
STM32F401RE, STM32F401VE
January 2015
This is information on a product in full production.
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STM32F401VD pdf, 반도체, 판매, 대치품
Contents
STM32F401xD STM32F401xE
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
6.3.12
6.3.13
6.3.14
6.3.15
6.3.16
6.3.17
6.3.18
6.3.19
6.3.20
6.3.21
6.3.22
6.3.23
6.3.24
6.3.25
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
PLL spread spectrum clock generation (SSCG) characteristics . . . . . . 84
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 89
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 113
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
7 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
7.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
7.1.1
WLCSP49, 3.06 x 3.06 mm, 0.4 mm pitch wafer level chip
size package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
7.1.2 UFQFPN48, 7 x 7 mm, 0.5 mm pitch package . . . . . . . . . . . . . . . . . . 119
7.1.3 LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package . . . . . . . . 122
7.1.4 LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package . . . . . . 125
7.1.5 UFBGA100, 7 x 7 mm, 0.5 mm pitch package . . . . . . . . . . . . . . . . . . 128
7.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.2.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
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STM32F401VD 전자부품, 판매, 대치품
STM32F401xD STM32F401xE
List of figures
List of figures
Figure 1.
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Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Compatible board design for LQFP100 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Compatible board design for LQFP64 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STM32F401xD/xE block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Multi-AHB matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Power supply supervisor interconnection with internal reset OFF . . . . . . . . . . . . . . . . . . . 20
PDR_ON control with internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Startup in regulator OFF: slow VDD slope -
power-down reset risen after VCAP_1/VCAP_2 stabilization. . . . . . . . . . . . . . . . . . . . . . . . . 24
Startup in regulator OFF mode: fast VDD slope -
power-down reset risen before VCAP_1/VCAP_2 stabilization . . . . . . . . . . . . . . . . . . . . . . . 24
STM32F401xD/xE WLCSP49 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
STM32F401xD/xE UFQFPN48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
STM32F401xD/xE LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
STM32F401xD/xE LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
STM32F401xD/xE UFBGA100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Input voltage measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
External capacitor CEXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Typical VBAT current consumption (LSE and RTC ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
ACCHSI versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
ACCLSI versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
PLL output clock waveforms in center spread mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
PLL output clock waveforms in down spread mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
FT I/O input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
I2S slave timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
I2S master timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
USB OTG FS timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . 106
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . 111
Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . 111
SDIO high-speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
SD default mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
WLCSP49 wafer level chip size package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
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전력 반도체 판매 ( IGBT, TR 모듈, SCR, 다이오드 모듈 )

휴대전화 : 010-3582-2743


상호 : 아이지 인터내셔날

전화번호 : 051-319-2877, [ 홈페이지 ]



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