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AT24C08C 데이터시트 PDF




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기능 EEPROM
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AT24C08C 데이터시트, 핀배열, 회로
AT24C04C and AT24C08C
I2C-Compatible, (2-wire) Serial EEPROM
4-Kbit (512 x 8), 8-Kbit (1024 x 8)
DATASHEET
Standard Features
Low-voltage and Standard-voltage Operation
̶ VCC = 1.7V to 5.5V
Internally Organized as 512 x 8 (4K), or 1024 x 8 (8K)
I2C-compatible (2-wire) Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1MHz (2.5V, 2.7V, 5V), 400kHz (1.7V) Compatibility
Write Protect Pin for Hardware Data Protection
16-byte Page Write Mode
̶ Partial Page Writes Allowed
Self-timed Write Cycle (5ms Max)
High-reliability
̶ Endurance: 1,000,000 Write Cycles
̶ Data Retention: 100 Years
Green Package Options (Pb/Halide-free/RoHS Compliant)
̶ 8-lead PDIP, 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN, 5-lead SOT23,
and 8-ball VFBGA
Die Options: Wafer Form and Tape and Reel
Description
The Atmel® AT24C04C and AT24C08C provides 4,096/8,192 bits of Serial
Electrically Erasable and Programmable Read-Only Memory (EEPROM)
organized as 512/1024 words of 8 bits each. The device is optimized for use in
many industrial and commercial applications where low-power and low-voltage
operation are essential. AT24C04C/08C is available in space-saving 8-lead PDIP,
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 5-lead SOT23, and 8-ball
VFBGA packages and is accessed via a 2-wire serial interface.
Atmel-8787E-SEEPROM-AT24C04C-08C-Datasheet_012015




AT24C08C pdf, 반도체, 판매, 대치품
4. Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses (A2 and A1): The AT24C04C uses the A2 and A1 inputs for hard wire addressing
allowing a total of four 4K devices to be addressed on a single bus system. Pin 1 is a no connect and can be
connected to ground (see Section 7. “Device Addressing” on page 10). The AT24C08C only uses the A2 input
for hardware addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1
pins are no connects and can be connected to ground (see Section 7.).
Write Protect (WP): AT24C04C/08C has a Write Protect pin that provides hardware data protection. The Write
Protect pin allows normal read/write operations when connected to Ground (GND). When the Write Protect pin
is connected to VCC, the write protection feature is enabled and operates as shown in Table 4-1.
Table 4-1. Write Protect
WP Pin Status
At VCC
At GND
Part of the Array Protected
Full array
Normal read/write operations
4 AT24C04C/08C [DATASHEET]
Atmel-8787E-SEEPROM-AT24C04C-08C-Datasheet_012015

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AT24C08C 전자부품, 판매, 대치품
6. Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop condition as defined below.
Figure 6-1. Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any
other command.
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the
Stop command will place the EEPROM in a standby power mode.
Figure 6-2. Start and Stop Definition
SDA
SCL
Start
Stop
AT24C04C/08C [DATASHEET]
Atmel-8787E-SEEPROM-AT24C04C-08C-Datasheet_012015
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