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PDF MC14049B Data sheet ( Hoja de datos )

Número de pieza MC14049B
Descripción Hex Buffer
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Hex Buffer
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex
Buffer are constructed with MOS P–Channel and N–Channel enhancement
mode devices in a single monolithic structure. These complementary MOS
devices find primary use where low power dissipation and/or high noise
immunity is desired. These devices provide logic level conversion using only
one supply voltage, VDD.
The input–signal high level (VIH) can exceed the VDD supply voltage for
logic level conversions. Two TTL/DTL loads can be driven when the devices
vare used as a CMOS–to–TTL/DTL converter (VDD = 5.0 V, VOL 0.4 V,
IOL 3.2 mA).
Note that pins 13 and 16 are not connected internally on these devices;
consequently connections to these terminals will not affect circuit operation.
High Source and Sink Currents
High–to–Low Level Converter
Supply Voltage Range = 3.0 V to 18 V
VIN can exceed VDD
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMeets JEDEC B Specifications
Improved ESD Protection On All Inputs
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS1 (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCharacteristic
Symbol
Value
Unit
DC Supply Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎInput Voltage (DC or Transient)
VDD
VIN
– 0.5 to + 18.0
– 0.5 to + 18.0
Vdc
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOutput Voltage (DC or Transient)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎInput Current (DC or Transient), per Pin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎOutput Current (DC or Transient), per Pin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPower Dissipation, per Package2
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ(Plastic/Ceramic)
(SOIC)
Vout
Iin
Iout
PD
– 0.5 to VDD + 0.5 Vdc
± 10 mA
+ 45 mA
mW
825
740
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎStorage Temperature
Tstg
– 65 to + 150
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎLead Temperature (8 – Second Soldering)
TL
260 _C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ1Maximum Ratings are those values beyond which damage to the device may occur.
2Temperature Derating: See Figure 3.
MC14049B
LOGIC DIAGRAM
MC14050B
32
32
54
54
76
76
9 10
9 10
11 12
11 12
14 15
REV 3
1/94
NC = PIN 13, 16
VSS = PIN 8
VDD = PIN 1
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
14 15
NC = PIN 13, 16
VSS = PIN 8
VDD = PIN 1
MC14049B
MC14050B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
VDD
OUTA
INA
OUTB
INB
OUTC
INC
VSS
1
2
3
4
5
6
7
8
16 NC
15 OUTF
14 INF
13 NC
12 OUTE
11 INE
10 OUTD
9 IND
MC14049B MC14050B
1

1 page




MC14049B pdf
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
16 9
–B–
18
CL
–T–
SEATING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC
1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
–A–
16
1
H
G
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
9
B
8
FC
S
L
–T–
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0_ 10_ 0_ 10 _
S 0.020 0.040 0.51 1.01
MOTOROLA CMOS LOGIC DATA
MC14049B MC14050B
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