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74AUP2G06 데이터시트 PDF




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부품번호 74AUP2G06 기능
기능 DUAL INVERTERS
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74AUP2G06 데이터시트, 핀배열, 회로
74AUP2G06
DUAL INVERTERS WITH OPEN DRAIN OUTPUTS
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed
for low power and extended battery life in portable applications.
The 74AUP2G06 is composed of two inverters with open drain
outputs designed for operation over a power supply range of 0.8V to
3.6V. The device is fully specified for partial power down applications
using IOFF. The IOFF circuitry disables the output preventing damaging
current backflow when the device is powered down. The gates
perform the positive Boolean function:
YA
Features
Advanced Ultra Low Power (AUP) CMOS
Supply Voltage Range from 0.8V to 3.6V
- 4mA Output Drive at 3.0V
Low Static Power Consumption
IC < 0.9µA
Low Dynamic Power Consumption
CPD = 1.2pF Typical at 3.6V
Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for
Slower Input Rise and Fall Time. The Hysteresis is Typically
250mV at VCC = 3.0V
IOFF Supports Partial-Power-Down Mode Operation
ESD Protection per JESD 22
Exceeds 200-V Machine Model (A115)
Exceeds 2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
Latch-Up Exceeds 100mA per JESD 78, Class I
Leadless packages per JESD30E
DFN1410 denoted as X2-DFN1410-6
DFN1010 denoted as X2-DFN1010-6
DFN0910 denoted as X2-DFN0910-6
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Pin Assignments
(Top View)
1A 1
GND 2
2A 3
6 1Y
5 Vcc
4 2Y
SOT363
(Top View)
1A 1
6 1Y
GND 2
5 Vcc
2A 3
4 2Y
X2-DFN1010-6
(Top View)
1A 1
GND 2
2A 3
6 1Y
5 Vcc
4 2Y
X2-DFN1410-6
(Top View)
1A 1
1Y
GND 2
5 Vcc
2A 3
4 2Y
X2-DFN0910-6
Applications
Suited for battery and low power needs
Wide array of products such as:
PCs, Networking, Notebooks, Netbooks, PDAs
Tablet Computers, E-readers
Computer Peripherals, Hard Drives, CD/DVD ROM
TV, DVD, DVR, Set-Top Box
Cell Phones, Personal Navigation / GPS
MP3 players ,Cameras, Video Recorders
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74AUP2G06
Document number: DS35510 Rev. 5 - 2
1 of 13
www.diodes.com
November 2014
© Diodes Incorporated




74AUP2G06 pdf, 반도체, 판매, 대치품
74AUP2G06
Electrical Characteristics (@TA = +25°C, unless otherwise specified.)
Symbol Parameter
Test Conditions
VCC
VIH
VIL
VOL
II
IOZ
IOFF
ΔIOFF
ICC
ΔICC
High-Level Input
Voltage
Low-Level Input
voltage
Low-Level Output
Voltage
Input Current
Z State
Leakage Current
Power Down
Leakage Current
Delta Power Down
Leakage Current
Supply Current
Additional Supply
Current
IOL = 20μA
IOL = 1.1mA
IOL = 1.7mA
IOL = 1.9mA
IOL = 2.3mA
IOL = 3.1mA
IOL = 2.7mA
IOL = 4mA
A or B Input, VI = GND to 3.6V
VO = 3.6V, Vi = 3.6V
VI or VO = 0V to 3.6V
VI or VO = 0V to 3.6V
VI = GND or VCC, IO = 0
One input at VCC -0.6V
Other inputs at VCC or GND
0.8V to 1.65V
1.65V to 1.95V
2.3V to 2.7V
3.0V to 3.6V
0.8V to 1.65V
1.65V to 1.95V
2.3V to 2.7V
3.0V to 3.6V
0.8V to 3.6V
1.1V
1.4V
1.65V
2.3V
3V
0V to 3.6V
3.6V
0V
0V to 0.2V
0.8V to 3.6V
3.3V
TA = +25°C
Min Max
0.80 X VCC
0.65 X VCC
1.6
2.0
0.30 X VCC
0.35 X VCC
0.7
0.9
0.1
0.3 X VCC
0.31
0.31
0.31
0.44
0.31
0.44
±0.1
±0.1
±0.2
±0.2
0.5
40
TA = -40 to +85°C
Min Max
0.80 X VCC
0.65 X VCC
1.6
2.0
0.30 X VCC
0.35 X VCC
0.7
0.9
0.1
0.3 X VCC
0.37
0.35
0.33
0.45
0.33
0.45
±0.5
±0.5
±0.6
±0.6
0.9
50
Unit
V
V
V
μA
μA
μA
μA
μA
μA
74AUP2G06
Document number: DS35510 Rev. 5 - 2
4 of 13
www.diodes.com
November 2014
© Diodes Incorporated

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74AUP2G06 전자부품, 판매, 대치품
Parameter Measurement Information
From Output
Under Test
CL
(see Note A)
RL
RL
VLOAD
74AUP2G06
TEST
tPLZ (See Notes D & E)
tPZL(See Notes D & F)
Condition
Vload
Vload
VCC
0.8V
1.2V±0.1V
1.5V±0.1V
1.8V±0.15V
2.5V±0.2V
3.3V±0.3V
Inputs
VI tr/tf
VCC ≤3 ns
VCC ≤3 ns
VCC ≤3 ns
VCC ≤3 ns
VCC ≤3 ns
VCC ≤3 ns
VM
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
tW
Input
VM
VM
Voltage Waveform Pulse Duration
Vl
0V
VLOAD
2 X VCC
2 X VCC
2 X VCC
2 X VCC
2 X VCC
2 X VCC
CL
5, 10, 15, 30pF
5, 10, 15, 30pF
5, 10, 15, 30pF
5, 10, 15, 30pF
5, 10, 15, 30pF
5, 10, 15, 30pF
Output
Control
VM
Output
Waveform
tPZL
VM
RL V∆
5kΩ 0.1V
5kΩ 0.1V
5kΩ 0.15V
5kΩ 0.15V
5kΩ 0.15V
5kΩ 0.3V
VM
tPLZ
Vl
0V
VLOAD/2
VOL + V
VOL
Voltage Waveform Propagation Delay Times
Figure 1 Load Circuit and Voltage Waveforms
Notes:
A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 10MHz.
C. The inputs are measured one at a time with one transition per measurement.
D. For the open drain device tPLZ and tPZL are the same as tPD.
E. tPZL is measured at VM.
D. tPLZ is measured at VOL +V.
74AUP2G06
Document number: DS35510 Rev. 5 - 2
7 of 13
www.diodes.com
November 2014
© Diodes Incorporated

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