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PDF SH66P51A Data sheet ( Hoja de datos )
| Número de pieza | SH66P51A | |
| Descripción | OTP 2K 4-bit Microcontroller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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SH66P51A
OTP 2K 4-bit Micro-controller with LCD Driver
Features
SH6610C-based single-chip 4-bit micro-controller
OTP ROM: 2K X 16 bits
RAM: 128 X 4 bits (Data RAM)
Operation voltage: 1.8V - 3.6V (Typically 3.0V)
18 CMOS bi-directional I/O pins
PORTA - PORTE;
PORTC shared with LCD SEG1 - 4
PORTD shared with LCD SEG5 - 8
PORTE shared with OSCXI, OSCXO
4-level subroutine nesting (including interrupts)
One 8-bit auto re-load timer/counter
One 8-bit base timer
Warm-up timer for power-on reset
Powerful interrupt sources:
- Internal interrupt (Timer0).
- Internal interrupt (Base Timer)
- External interrupts: PORTB & PORTC (falling edge).
Built-in remote control programmable carrier synthesizer
Built-in in LCD voltage regulator
Pull-high resistor for reset pin (select by Code Option)
Built-in Low Power Detect (2.3 ± 0.1V)
LCD driver:
3 X 29 dots (1/3 duty 1/3 bias)
4 X 28 dots (1/4 duty 1/3 bias)
5 X 27 dots (1/5 duty 1/3 bias)
6 X 26 dots (1/6 duty 1/3 bias)
Dual Clock Source
OSC (select by Code Option):
- Crystal oscillator: 32.768kHz
- RC oscillator: 131kHz
OSCX:
- Ceramic/Crystal oscillator: 400k - 4MHz
- Built-in RC: (4MHz ± 2%)
Instruction Cycle Time (4/fOSC)
Two low power operation modes: HALT and STOP
Built-in watchdog timer
Built-in Low Voltage Reset Circuit (1.7 ± 0.1V)
Chip Form and 64-Pin LQFP/48-Pin TQFP/44-Pin
QFP/44-Pin LQFP Package.
General Description
SH66P51A is dedicated to infrared remote control transmitter with LCD applications. This chip integrates the SH6610C 4-bit
CPU core with SRAM, OTP ROM, one 8-bit timer, one base timer, LCD driver, programmable input/output driving buffers,
carrier synthesizer, and voltage regulator. This chip integrates a dual-oscillator to enhance the total chip performance.
1 V2.2
1 page  
Block Diagram
CPU CORE
RESET
VDD
GND
SH66P51A
OTP ROM
(2048 X 16)
RAM (128 X 4 )
8BIT TIMER0
& 8BIT BASE TIMER
LCD RAM
POWER CONTROL
CIRCUIT
INTERNAL 4M RC
TEST
OSC
I/O PORTS (4 X 4 + 2)
REMOTE CONTROL
SYNTHESIZER
COMMON DRIVERS
SEGMENT DRIVERS
LCD POWER
OSC
OSCX
PORTE[1:0]
PORTD[3:0]
PORTC[3:0]
PORTB[3:0]
PORTA[3:0]
REM
COM1 - COM4
SEG1 - SEG28
VP1 - VP3, VSUB
CUP1, CUP2
5
5 Page 
4. Initial State
4.1. System Register State:
Address Bit 3
Bit 2
Bit 1
Bit 0
$00
-
IET0
IEBT
IEP
$01 - IRQT0 IRQBT IRQP
$02
-
TM0.2
TM0.1
TM0.0
$03 BTM.3 BTM.2 BTM.1 BTM.0
$04
TL0.3 TL0.2
TL0.1
TL0.0
$05
TH0.3 TH0.2
TH0.1
TH0.0
$06 -
-
- LPD
$07
- LCDON
-
$08
PA.3
PA.2
PA.1
-
PA.0
$09
PB.3
PB.2
PB.1
PB.0
$0A
PC.3
PC.2
PC.1
PC.0
$0B
PD.3
PD.2
PD.1
$0C -
- PE.1
PD.0
PE.0
$0D -
-
- REM
$0E
TBR.3 TBR.2
TBR.1
TBR.0
$0F
INX.3 INX.2
INX.1
INX.0
$10
DPL.3 DPL.2
DPL.1
DPL.0
$11
-
DPM.2 DPM.1
DPM.0
$12
-
DPH.2 DPH.1
DPH.0
$13 PULLEN CPS2
CPS1
CPS0
$14 OXS
-
OXM
OXON
$15
O/S1
O/S0
DUTY1
DUTY0
$16
PAIN
PBIN
PCIN
PDIN
$17 -
-
- PEIN
$18 PACR.3 PACR.2 PACR.1 PACR.0
$19 PBCR.3 PBCR.2 PBCR.1 PBCR.0
$1A PCCR.3 PCCR.2 PCCR.1 PCCR.0
$1B PDCR.3 PDCR.2 PDCR.1 PDCR.0
$1C PECR.1 PECR.0
$1D -
-
-
-
$1E
WDT WDT.2 WDT.1
WDT.0
$1F -
-
-
-
$20
CFL3 CFL2
CFL1
CFL0
$21
CFL7 CFL6
CFL5
CFL4
$22
CFH3 CFH2
CFH1
CFH0
$23
CFH7 CFH6
CFH5
CFH4
Legend: x = unknown, u = unchanged, - = unimplemented.
Power On Reset
/Pin Reset
/Low Voltage Reset
-000
-000
-000
0000
xxxx
xxxx
---0
-0--
0000
0000
0000
0000
--00
---0
xxxx
xxxx
xxxx
-xxx
-xxx
0000
0-00
1100
0000
---0
0000
0000
0000
0000
--00
-
0000
-
0000
0000
0000
0000
11
SH66P51A
WDT Reset
-000
-000
-uuu
uuuu
xxxx
xxxx
---0
-u--
0000
0000
0000
0000
--00
---0
uuuu
uuuu
uuuu
-uuu
-uuu
0uuu
u-0u
uuuu
uuuu
---u
0000
0000
0000
0000
--00
-
1000
-
uuuu
uuuu
uuuu
uuuu
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH66P51A.PDF ] | |
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