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PDF ADM1034 Data sheet ( Hoja de datos )
| Número de pieza | ADM1034 | |
| Descripción | Thermal Monitor and Fan Speed (RPM) Controller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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ADM1034
Thermal Monitor and Fan
Speed (RPM) Controller
The ADM1034 is a dual-channel remote- and local-temperature
sensor and fan controller. The remote channels monitor the
temperature of two remote thermal diodes, which may be discrete
2N3904/6s or may be located on a microprocessor die. The device also
monitors its own ambient temperature.
The ADM1034 can monitor and control the speed of two cooling
fans. The user can program a target fan speed, or else use the look-up
table to input a temperature-to-fan speed profile. The look-up table
can be configured to run the fans at discrete speeds (discrete mode) or
to ramp the fan speed with temperature (linear mode).
The ADM1034 communicates over a 2-wire SMBus 2.0 interface.
An 8-level LOCATION input allows the user to choose between
SMBus 1.1 and SMBus 2.0. An ALERT output indicates error
conditions. The THERM I/O signals overtemperature as an output and
times THERM assertions as an input. Pin 8 can be configured as a
reference for the THERM (PROCHOT) input.
Features
1 Local and 2 Remote Temperature Channels
1C Accuracy on Local and Remote Channels
Automatic Remote Temperature Channels, Up to 1 kW
Fast (Up to 64 Measurements per Second)
SMBus 2.0, 1.1, and 1.0 Compliant
SMBus Address Input/LOCATION Input to UDID
Programmable Over/Undertemperature Limits
Programmable Fault Queue
SMBusALERT Output
Fail-Safe Overtemperature Comparator Output
Fan Speed (RPM) Controller
Look-up Table for Temperature-to-Fan Speed Control
Linear and Discrete Options for Look-up Table
FAN_FAULT Output
THERM Input, Used to Time PROCHOT Assertions
REF Input, Used as Reference for THERM (PROCHOT)
3.0 V to 5.5 V Supply
Small 16-lead QSOP Package
This is a Pb-Free Device*
Applications
Desktop and Notebook PCs
Embedded Systems
Telecommunications Equipment
LCD Projectors
* For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2012
April, 2012 − Rev. 4
1
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QSOP−16
CASE 492
PIN ASSIGNMENT
DRIVE1 1
TACH1 2
DRIVE2 3
TACH2 4
GND 5
VCC 6
THERM 7
FAN_FAULT/REF 8
ADM1034
16 SCL
15 SDA
14 ALERT
13 LOCATION
12 D2+
11 D2−
10 D1+
9 D1−
(Top View)
MARKING DIAGRAM
1034A
RQZ
#YYWW
1034ARQZ = Specific Device Code
# = Pb-Free Package
YY = Date Code
WW = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 37 of this data sheet.
Publication Order Number:
ADM1034/D
1 page  
ADM1034
Table 4. ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted). (Note 1)
Parameter
Test Conditions/Comments
Min Typ Max Unit
Tachometer Accuracy
Fan Speed Measurement Accuracy
SERIAL BUS TIMING (Note 4)
− − 4.0 %
Clock Frequency, fSCLK
See Figure 2 for All Parameters
− − 400 kHz
Glitch Immunity, tSW
− 50 − ns
Bus Free Time, tBUF
1.3 −
− ms
Start Setup Time, tSU:STA
0.6 −
− ms
Start Hold Time, tHD:STA
0.6 −
− ms
Stop Condition Setup Time tSU:STO
0.6 −
− ms
SCL Low Time, tLOW
1.3 −
− ms
SCL High Time, tHIGH
0.6 −
− ms
SCL, SDA Rise Time, tr
−
−
1000
ns
SCL, SDA Fall Time, tf
− − 300 ns
Data Setup Time, tSU:DAT
100 −
− ns
Detect Clock Low Timeout, tTIMEOUT
(Note 5)
25 − 35 ms
1. Typicals are at TA = 25C and represent most likely parametric norm. Standby current typ. is measured with VCC = 3.3 V. Timing
specifications are tested at logic levels of VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge.
2. Operation at 5.5 V is guaranteed by design, not production tested.
3. Recommend use of 100 kW pullup resistors for all open-drain outputs from the ADM1034.
4. Guaranteed by design, not production tested.
5. SMBus timeout disabled by default. See the SMBus section for more information.
SCL
SDA
tBUF
PS
t LOW
tR
tHD; STA
tHD; DAT
tF
tHIGH
tSU; DAT
t HD; STA
tSU; STA
S
Figure 2. Serial Bus Timing Diagram
tSU; STO
P
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5 Page 
ADM1034
clock pulse to assert a stop condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the 9th clock pulse.
This is known as no acknowledge. The master
takes the data line low during the low period
before the 10th clock pulse, then high during the
10th clock pulse to assert a stop condition.
It is not possible to mix read and write in one operation,
because the type of operation is determined at the beginning
and cannot be changed without starting a new operation.
To write data to one of the device data registers or to read
data from it, the address pointer register (APR) must be set
so that the correct data register is addressed; then data can be
written into that register or read from it. The first byte of a
write operation always contains an address that is stored in
the APR. If data is to be written to the device, then the write
operation contains a second data byte, which is written to the
register selected by the APR.
As illustrated in Figure 17, the device address is sent over
the bus, followed by R/W set to 0. This is followed by two
data bytes. The first data byte is the address of the internal
data register to be written to, which is stored in the APR. The
second data byte is the data to be written to the internal data
register.
When reading data from a register there are two
possibilities.
If the ADM1034’s APR value is unknown or incorrect, it
must be set to the correct value before data can be read from
the desired data register. To do this, perform a write to the
ADM1034 as before, but send only the data byte containing
the register. (See Figure 18.) A read operation is then
performed, using the serial bus address and the R/W bit set
to 1, followed by the data byte read from the data register.
(See Figure 19.)
However, if the APR is already at the desired address, data
can be read from the corresponding data register without
first writing to the APR. In this case, Figure 18 can be
omitted.
In Figure 17 to Figure 19, the serial bus address is
determined by the state of the LOCATION pin on powerup.
SCL
1
91
9
SDA
START BY
MASTER
A6
A5 A4 A3 A2 A1 A0
FRAME 1
SERIAL BUS ADDRESS BYTE
SCL (CONTINUED)
R/W
D7
ACK. BY
ADM1034
1
D6 D5 D4 D3 D2 D1 D0
FRAME 2
ADDRESS POINTER REGISTER BYTE
9
ACK. BY
ADM1034
SDA (CONTINUED)
D7 D6 D5 D4 D3 D2 D1 D0
FRAME 3
DATA BYTE
ACK. BY STOP BY
ADM1034 MASTER
Figure 17. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
SCL
1
91
9
SDA
START BY
MASTER
A6
A5 A4 A3 A2 A1 A0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
ADM1034
D6 D5 D4 D3 D2 D1 D0
FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
ADM1034
STOP BY
MASTER
Figure 18. Writing to the Address Pointer Register Only (Send Byte)
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADM1034.PDF ] | |
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