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부품번호 ATWILC1000A
기능 IEEE 802.11 b/g/n Link Controller SoC
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ATWILC1000A 데이터시트, 핀배열, 회로
ATWILC1000A-MUT
IEEE 802.11 b/g/n Link Controller SoC
Datasheet
Description
ATWILC1000A is a single chip IEEE® 802.11 b/g/n Radio/Baseband/MAC link
controller optimized for low-power mobile applications. ATWILC1000A supports
single stream 1x1 802.11n mode providing up to 72Mbps PHY rate. The
ATWILC1000A features fully integrated Power Amplifier, LNA, Switch, and Power
Management. Implemented in 65nm CMOS technology, the ATWILC1000A
offers very low power consumption while simultaneously providing high
performance and minimal bill of materials.
The ATWILC1000A supports two and three Bluetooth coexistence protocols. The
ATWILC1000A provides multiple peripheral interfaces including UART, SPI, I2C,
and SDIO. The only external clock source needed for the ATWILC1000A is a
high-speed crystal or oscillator with a wide range of reference clock frequencies
supported (12-40MHz). The ATWILC1000A is available in both QFN and Wafer
Level Chip Scale Package (WLCSP) packaging.
Features
IEEE 802.1 b/g/n 20MHz (1x1) solution
Single spatial stream in 2.4GHz ISM band
Integrated PA and T/R Switch
Superior Sensitivity and Range via advanced PHY signal processing
Advanced Equalization and Channel Estimation
Advanced Carrier and Timing Synchronization
Wi-Fi Direct and Soft-AP support
Supports IEEE 802.11 WEP, WPA, WPA2 Security
Supports China WAPI security
Superior MAC throughput via hardware accelerated two-level A-MSDU/A-
MPDU frame aggregation and block acknowledgement
On-chip memory management engine to reduce host load
SPI, SDIO, UART, and I2C host interfaces
2/3 wire Bluetooth coexistence interface
Operating temperature range of -40°C to +85°C
Power save modes:
<1µA Deep Power Down mode typical @3.3V I/O
280µA Doze mode with chip settings preserved (used for beacon monitoring)
On-chip low power sleep oscillator
Fast host wake-up from Doze mode by a pin or host I/O transaction
Atmel-42351C-ATWILC1000A-MUT-SmartConnect-Datasheet_022015




ATWILC1000A pdf, 반도체, 판매, 대치품
1 Ordering Information and IC Marking
Table 1-1. Ordering Details
Atmel Official Part Number (for ordering)
ATWILC1000A-MU-T
Package Type
5x5 QFN in Tape and Reel
IC Marking
ATWILC1000A
2 Block Diagram
Figure 2-1. ATWILC1000A Block Diagram
Vbatt
SDIO
SPI
I2C
UART
Bluetooth
Coexistance
Host Interface
GPIO
RTC
Clock
PMU
XO
Microcontroller
802.11bgn
Forward
Error
Correction
802.11bgn
OFDM
Channel
Estimation /
Equalization
Rx
Digital
Core
802.11bgn
MAC
ADC X
PLL ~
RAM
802.11bgn
Coding
802.11bgn
iFFT
Tx
Digital
Core
DPD
DAC
X
3 Pin-Out and Package Information
3.1 Pin Description
ATWILC1000A is offered in an exposed pad 40-pin QFN package. This package has an exposed paddle that
must be connected to the system board ground. The QFN package pin assignment is shown in Figure 3-1. The
color shading is used to indicate the pin type as follows: green power, red analog, blue digital I/O, yellow
digital input, grey unconnected or reserved. The ATWILC1000A pins are described in Table 3-1.
4 A4TWILC1000A-MUT [DATASHEET]
Atmel-42351C-ATWILC1000A-MUT-SmartConnect-Datasheet_022015

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ATWILC1000A 전자부품, 판매, 대치품
The ATWILC1000A 40L QFN package view is shown in Figure 3-2.
Figure 3-2. QFN Package
The QFN package is a qualified Green Package.
ATWILC1000A-MUT [DATASHEET]
Atmel-42351C-ATWILC1000A-MUT-SmartConnect-Datasheet_022015
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ATWILC1000A

IEEE 802.11 b/g/n Link Controller SoC

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