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74VHC08 데이터시트 PDF




NXP Semiconductors에서 제조한 전자 부품 74VHC08은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 74VHC08 기능
기능 Quad 2-input AND gate
제조업체 NXP Semiconductors
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74VHC08 데이터시트, 핀배열, 회로
74VHC08; 74VHCT08
Quad 2-input AND gate
Rev. 01 — 30 June 2009
Product data sheet
1. General description
The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard JESD7-A.
The 74VHC08; 74VHCT08 provide the quad 2-input AND function.
2. Features
I Balanced propagation delays
I All inputs have a Schmitt-trigger action
I Inputs accepts voltages higher than VCC
I Input levels:
N The 74VHC08 operates with CMOS logic levels
N The 74VHCT08 operates with TTL logic levels
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
N CDM JESD22-C101C exceeds 1000 V
I Multiple package options
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
74VHC08D
74VHCT08D
40 °C to +125 °C SO14
plastic small outline package; 14 leads;
body width 3.9 mm
74VHC08PW
74VHCT08PW
40 °C to +125 °C
TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74VHC08BQ
74VHCT08BQ
40 °C to +125 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
Version
SOT108-1
SOT402-1
SOT762-1




74VHC08 pdf, 반도체, 판매, 대치품
NXP Semiconductors
74VHC08; 74VHCT08
Quad 2-input AND gate
Table 4. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
Ptot total power dissipation
SO14 package
Tamb = 40 °C to +125 °C
[2] -
500 mW
TSSOP14 package
[3] -
500 mW
DHVQFN14 package
[4] -
500 mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 °C.
[3] Ptot derates linearly with 5.5 mW/K above 60 °C.
[4] Ptot derates linearly with 4.5 mW/K above 60 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VCC
VI
VO
Tamb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
9. Static characteristics
74VHC08
Min Typ
2.0 5.0
0-
0-
40 +25
--
--
Max
5.5
5.5
VCC
+125
100
20
74VHCT08
Min Typ
4.5 5.0
0-
0-
40 +25
--
--
Max
5.5
5.5
VCC
+125
-
20
Unit
V
V
V
°C
ns/V
ns/V
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
For type 74VHC08
VIH HIGH-level VCC = 2.0 V
input voltage VCC = 3.0 V
VCC = 5.5 V
VIL
LOW-level
VCC = 2.0 V
input voltage VCC = 3.0 V
VCC = 5.5 V
VOH HIGH-level VI = VIH or VIL
output voltage IO = 50 µA; VCC = 2.0 V
IO = 50 µA; VCC = 3.0 V
IO = 50 µA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
25 °C
40 °C to +85 °C 40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
1.5 - - 1.5
-
1.5
-V
2.1 - - 2.1
-
2.1
-V
3.85 -
- 3.85
-
3.85
-V
- - 0.5 -
0.5
-
0.5 V
- - 0.9 -
0.9
-
0.9 V
- - 1.65 -
1.65
-
1.65 V
1.9 2.0 -
1.9
-
1.9
-V
2.9 3.0 -
2.9
-
2.9
-V
4.4 4.5 -
4.4
-
4.4
-V
2.58 -
- 2.48
-
2.4
-V
3.94 - - 3.8
-
3.7
-V
74VHC_VHCT08_1
Product data sheet
Rev. 01 — 30 June 2009
© NXP B.V. 2009. All rights reserved.
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74VHC08 전자부품, 판매, 대치품
NXP Semiconductors
11. Waveforms
74VHC08; 74VHCT08
Quad 2-input AND gate
VI
nA, nB input
GND
VOH
nY output
VOL
VM
t PHL
VM
t PLH
mna224
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
The input (nA, nB) to output (nY) propagation delays
Table 8. Measurement points
Type
74VHC08
74VHCT08
Input
VM
0.5VCC
1.5 V
Output
VM
0.5VCC
0.5VCC
74VHC_VHCT08_1
Product data sheet
Rev. 01 — 30 June 2009
© NXP B.V. 2009. All rights reserved.
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