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부품번호 NBA3N206S 기능
기능 3.3V Differential Multipoint Low Voltage M-LVDS Driver Receiver
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NBA3N206S 데이터시트, 핀배열, 회로
NBA3N206S
3.3 V Differential Multipoint
Low Voltage M-LVDS Driver
Receiver
Description
The NBA3N206S is a 3.3 V supply differential Multipoint Low
Voltage (M−LVDS) line Driver and Receiver. NBA3N206S offers the
Type 2 receiver threshold at 0.1 V.
The NBA3N206S has Type−2 receivers that detect the bus state with
as little as 50 mV of differential input voltage over a common−mode
voltage range of −1 V to 3.4 V. Type−2 receivers include an offset
threshold to provide a detectable voltage under open−circuit, idle−bus,
and other faults conditions.
NBA3N206S supports Simplex or Half Duplex bus configurations.
Features
Low−Voltage Differential 30 W to 55 W Line Drivers and Receivers
for Signaling Rates Up to 200 Mbps
Type−2 Receivers Provide an Offset (100 mV) Threshold to Detect
Open−Circuit and Idle−Bus Conditions
Controlled Driver Output Voltage Transition Times for Improved
Signal Quality
−1 V to 3.4 V Common−Mode Voltage Range Allows Data Transfer
With up to 2 V of Ground Noise
Bus Pins High Impedance When Disabled or VCC 1.5 V
M−LVDS Bus Power Up/Down Glitch Free
Operating range: VCC = 3.3 ±10% V( 3.0 to 3.6 V)
Operation from –40°C to +125°C.
AEC−Q100 Qualified and PPAP Capable
These are Pb−Free Devices
Applications
Low−Power High−Speed Short−Reach Alternative to TIA/EIA−485
Backplane or Cabled Multipoint Data and Clock Transmission
Cellular Base Stations
Central−Office Switches
Network Switches and Routers
Automotive
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAM
8
NA206
AYWW
G
1
NA206
A
Y
WW
G or G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 2
1
Publication Order Number:
NBA3N206S/D




NBA3N206S pdf, 반도체, 판매, 대치품
NBA3N206S
Table 5. DC CHARACTERISTICS VCC = 3.3 ±10% V( 3.0 to 3.6 V), GND = 0 V, TA = −40°C to +125°C (See Notes 4, 5)
Symbol
Characteristic
Min Typ Max
ICC
VIH
VIL
VBUS
Power Supply Current
Receiver Disabled Driver Enabled RE and DE at VCC, RL = 50 W, All others open
Driver and Receiver Disabled RE at VCC, DE at 0 V, RL = No Load, All others open
Driver and Receiver Enabled RE at 0 V, DE at VCC, RL = 50 W, All others open
Receiver Enabled Driver Disabled RE at 0 V, DE at 0 V, RL = 50 W, All others open
Input HIGH Voltage
Input LOW Voltage
Voltage at any bus terminal VA, VB, VY or VZ
13 22
14
16 24
13
2
GND
VCC
0.8
−1.4 3.8
|VID|
DRIVER
Magnitude of differential input voltage
0.05
VCC
|VAB|
D|VAB|
VOS(SS)
DVOS(SS)
Differential output voltage magnitude (see Figure 4)
Change in Differential output voltage magnitude between logic states (see Figure 4)
Steady state common mode output voltage (see Figure 5)
Change in Steady state common mode output voltage between logic states (see
Figure 5)
440
−50
0.8
−50
690
50
1.2
50
VOS(PP) Peak−to−peak common−mode output voltage (see Figure 5)
VAOC Maximum steady−state open−circuit output voltage (see Figure 9)
150
0 2.4
VBOC
VP(H)
VP(L)
IIH
IIL
JIOSJ
IOZ
IO(OFF)
Maximum steady−state open−circuit output voltage (see Figure 9)
Voltage overshoot, low−to−high level output (see Figure 7)
Voltage overshoot, high−to−low level output (see Figure 7)
High−level input current (D, DE) VIH = 2 V
Low−level input current (D, DE) VIL = 0.8 V
Differential short−circuit output current magnitude (see Figure 6)
High−impedance state output current (driver only)
−1.4 V (VA or VB) 3.8 V, other output at 1.2 V
Power−off output current (0 V VCC 1.5 V)
−1.4 V (VA or VB) 3.8 V, other output at 1.2 V
0
−0.2 VSS
0
0
−15
−10
2.4
1.2 VSS
10
10
24
10
10
RECEIVER
VIT+ Positive−going Differential Input voltage Threshold (See Figure 11 & Table 8)
Type 2
150
VIT− Negative−going Differential Input voltage Threshold (See Figure 11 & Table 8)
Type 2 50
VHYS Differential Input Voltage Hysteresis (See Figure 11 and Table 2)
Type 2
0
VOH High−level output voltage (IOH = –8 mA
2.4
VOL Low−level output voltage (IOL = 8 mA)
0.4
IIH RE High-level input current (VIH = 2 V)
−10 0
IIL RE Low-level input current (VIL = 0.8 V)
−10 0
IOZ High−impedance state output current (VO = 0 V of 3.6 V)
−10 15
CA / CB Input Capacitance VI = 0.4 sin(30E6πt) + 0.5 V, other outputs at 1.2 V using HP4194A
impedance analyzer (or equivalent)
3
CAB Differential Input Capacitance VAB = 0.4 sin(30E6πt) V, other outputs at 1.2 V using
HP4194A impedance analyzer (or equivalent)
2.5
CA/B Input Capacitance Balance, (CA/CB)
99 101
Unit
mA
V
V
V
mV
mV
V
mV
mV
V
V
V
V
uA
uA
mA
uA
uA
mV
mV
mV
V
V
mA
mA
mA
pF
pF
%
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NBA3N206S 전자부품, 판매, 대치품
NBA3N206S
A. All input pulses are supplied by a generator having the following characteristics: tr or tf 1 ns, pulse frequency = 500 kHz,
duty cycle = 50 ± 5%.
B. C1, C2 and C3 include instrumentation and fixture capacitance within 2 cm of the D.U.T. and are 20% tolerance.
C. R1 and R2 are metal film, surface mount, 1% tolerance, and located within 2 cm of the D.U.T.
D. The measurement of VOS(PP) is made on test equipment with a –3 dB bandwidth of at least 1 GHz.
Figure 5. Test Circuit and Definitions for the Driver Common−Mode Output Voltage
Figure 6. Driver Short−Circuit Test Circuit
A. All input pulses are supplied by a generator having the following characteristics: tr or tf1 ns, frequency = 500 kHz,
duty cycle = 50 ±5%.
B. C1, C2, and C3 include instrumentation and fixture capacitance within 2 cm of the D.U.T. and are 20%.
C. R1 is a metal film, surface mount, and 1% tolerance and located within 2 cm of the D.U.T.
D. The measurement is made on test equipment with a −3 dB bandwidth of at least 1 GHz.
Figure 7. Driver Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
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NBA3N206S

3.3V Differential Multipoint Low Voltage M-LVDS Driver Receiver

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