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PDF FQD3P50TM_F085 Data sheet ( Hoja de datos )

Número de pieza FQD3P50TM_F085
Descripción 500V P-Channel MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FQD3P50TM_F085 Hoja de datos, Descripción, Manual

November 2010
FQD3P50TM_F085
500V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
Features
• -2.1A, -500V, RDS(on) = 4.9@VGS = -10 V
• Low gate charge ( typical 18 nC)
• Low Crss ( typical 9.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
Qualified to AEC Q101
• RoHS Compliant
S
D!
GS
D-PAK
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
G!
▶▲
!
D
FQD3P50TM_F085
-500
-2.1
-1.33
-8.4
± 30
250
-2.1
5.0
-4.5
2.5
50
0.4
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Fairchild Semiconductor Corporation
FQD3P50TM_F085 Rev. C1
1
Typ Max Units
-- 2.5 °C/W
-- 50 °C/W
-- 110 °C/W
www.fairchildsemi.com

1 page




FQD3P50TM_F085 pdf
Gate Charge Test Circuit & Waveform
50KΩ
Same Type
as DUT
12V 200nF
300nF
VGS
-10V
Qg
VGS
VDS
Qgs Qgd
-3mA
DUT
Charge
Resistive Switching Test Circuit & Waveforms
-10V
VDS
VGS
RG
RL
VDD
DUT
td(on)
VGS 10%
t on
tr
VDS
90%
t off
td(off)
tf
-10V
tp
Unclamped Inductive Switching Test Circuit & Waveforms
L
VDS
EAS = --21-- L IAS2
BVDSS
--------------------
BVDSS - VDD
t p Time
ID
RG
VDD
VDD
ID (t)
VDS (t)
DUT
IAS
BVDSS
FQD3P50TM_F085 Rev. C1
5
www.fairchildsemi.com

5 Page










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