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PDF NCV8877 Data sheet ( Hoja de datos )
| Número de pieza | NCV8877 | |
| Descripción | Automotive Grade Start-Stop Non-Synchronous Boost Controller | |
| Fabricantes | ON Semiconductor | |
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NCV8877
Automotive Grade
Start-Stop Non-Synchronous
Boost Controller
The NCV8877 is a Non-Synchronous Boost controller designed to
supply a minimum output voltage during Start-Stop vehicle operation
battery voltage sags. The controller drives an external N-channel
MOSFET. The device uses peak current mode control with internal
slope compensation. The IC incorporates an internal regulator that
supplies charge to the gate driver.
Protection features include, cycle-by-cycle current limiting and
thermal shutdown.
Additional features include low quiescent current sleep mode
operation. The NCV8877 is enabled when the supply voltage drops
below the wake up threshold. Boost Operation is initiated when the
supply voltage drops below the regulation set point.
Features
• Automatic Enable Below Wake Up Threshold Voltage (Factory
Programmable)
• Override Disable Function
• Boost Mode Operation at Regulation Set Point
• $2% Output Accuracy Over Temperature Range
• Peak Current Mode Control with Internal Slope Compensation
• Externally Adjustable Frequency Operation
• Wide Input Voltage Range of 2 V to 40 V, 45 V Load Dump
• Low Quiescent Current in Sleep Mode (<12 mA Typical)
• Cycle−by−Cycle Current Limit Protection
• Hiccup−Mode Overcurrent Protection (OCP)
• Thermal Shutdown (TSD)
• This is a Pb−Free Device
Typical Applications
• Applications Requiring Regulated Voltage through Cranking and
Start−Stop Operation
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAM
8
8877xx
ALYW
G
1
8877xx = Specific Device Code
xx = 00, 01, 20, 40
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
PIN CONNECTIONS
DISB 1
ISNS 2
GND 3
GDRV 4
8 ROSC
7 VC
6 VOUT
5 VDRV
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NCV887700D1R2G
NCV887701D1R2G
NCV887711D1R2G
SOIC−8
NCV887720D1R2G (Pb−Free)
2500 / Tape &
Reel
NCV887721D1R2G
NCV887740D1R2G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
September, 2016 − Rev. 7
1
Publication Order Number:
NCV8877/D
1 page  
NCV8877
ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 3.6 V < VOUT < 40 V, unless otherwise specified) Min/Max values are
guaranteed by test, design or statistical correlation.
Characteristic
Symbol
Conditions
Min Typ Max Unit
VOLTAGE ERROR OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
VEA Sourcing Current
VEA Sinking Current
VEA Clamp Voltage
GDRV Switching Delay
Isrc,vea
VEA output current, Vc = 2.0 V
80 100
−
Isnk,vea VEA output current, Vc = 1.5 V
80 100
−
Vc,clamp VOUT < VOUT,des
− 1.1 −
VOUT < VOUT,des or when IC DISB goes
from low to high with Vc pin compensation
network disconnected
−
55 64
mA
mA
V
ms
GATE DRIVER
Sourcing Current
Sinking Current
Driving Voltage Dropout (Note 2)
Driving Voltage Source Current
Backdrive Diode Voltage Drop
Driving Voltage
Isrc
Isink
Vdrv,do
Idrv
Vd,bd
VDRV
VDRV ≥ Typical Driving Voltage Specifica-
tion, VDRV − VGDRV = 2 V
VGDRV ≥ 2 V
VOUT − VDRV, IvDRV = 25 mA
VOUT − VDRV = 1 V
VDRV – VOUT, Id,bd = 5 mA
IVDRV = 0.1 − 25 mA
NCV887700
NCV887701
NCV887711
NCV887720
NCV887721
NCV887740
550
480
−
35
−
5.8
5.8
5.7
5.8
5.92
5.8
800
600
0.3
45
−
6.0
6.0
5.9
6.0
6.12
6.0
−
−
0.6
−
0.7
6.2
6.2
6.1
6.2
6.32
6.2
mA
mA
V
mA
V
V
Pull−down Resistance
− 21 − kW
UVLO
Undervoltage Lock−out,
Threshold Voltage
Vuvlo
VOUT falling
NCV887700 3.60 3.80 4.00
NCV887701 3.60 3.80 4.00
NCV887711 3.54 3.73 3.93
NCV887720 3.60 3.80 4.00
NCV887721 3.67 3.87 4.08
NCV887740 3.60 3.80 4.00
V
Undervoltage Lock−out,
Hysteresis
Vuvlo,hys VOUT rising
NCV887700 330 450 570 mV
NCV887701 330 450 570
NCV887711 325 442 563
NCV887720 330 450 570
NCV887721 337 459 581
NCV887740 330 450 570
THERMAL SHUTDOWN
Thermal Shutdown Threshold (Note Tsd TJ rising
2)
160 170 180
°C
Thermal Shutdown Hysteresis (Note
2)
Tsd,hys
TJ falling
10 15 20 °C
Thermal Shutdown Delay (Note 2)
VOLTAGE REGULATION
tsd,dly
From TJ > Tsd to stop switching
− − 100 ns
Voltage Regulation
VOUT,reg
NCV887700
NCV887701
NCV887711
NCV887720
NCV887721
NCV887740
6.66
6.66
8.06
9.80
10.08
11.76
6.80
6.80
8.55
10.00
10.28
12.00
6.94
6.94
8.72
10.20
10.49
12.24
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Not tested in production. Limits are guaranteed by design.
www.onsemi.com
5
5 Page 
NCV8877
If the voltage across the current sense resistor exceeds the
over current threshold voltage the device enters over current
hiccup mode. The device will remain off for the hiccup time
and then go through the soft−start procedure.
UVLO
Input Undervoltage Lockout (UVLO) is provided to
ensure that unexpected behavior does not occur when VIN
is too low to support the internal rails and power the
controller. The IC will start up when enabled and VIN
surpasses the UVLO threshold plus the UVLO hysteresis
and will shut down when VIN drops below the UVLO
threshold or the part is disabled.
VDRV
An internal regulator provides the drive voltage for the
gate driver. Bypass with a ceramic capacitor to ground to
ensure fast turn on times. The capacitor should be between
0.1 mF and 1 mF, depending on switching speed and charge
requirements of the external MOSFET.
VDRV uses an internal linear regulator to charge the
VDRV bypass capacitor. VOUT must be decoupled at the IC
by a capacitor that is equal or larger in value than the VDRV
decoupling capacitor.
APPLICATION INFORMATION
Design Methodology
This section details an overview of the component selection
process for the NCV8877 in continuous conduction mode
boost. It is intended to assist with the design process but does
not remove all engineering design work. Many of the
equations make heavy use of the small ripple approximation.
This process entails the following steps:
1. Define Operational Parameters
2. Select Operating Frequency
3. Select Current Sense Resistor
4. Select Output Inductor
5. Select Output Capacitors
6. Select Input Capacitors
7. Select Compensator Components
8. Select MOSFET(s)
9. Select Diode
10. Design Notes
11. Determine Feedback Loop Compensation Network
1. Define Operational Parameters
Before beginning the design, define the operating
parameters of the application. These include:
VIN(min): minimum input voltage [V]
VIN(max): maximum input voltage [V]
VOUT: output voltage [V]
IOUT(max): maximum output current [A]
ICL: desired typical cycle-by-cycle current limit [A]
From this the ideal minimum and maximum duty cycles
can be calculated as follows:
Dmin
+
1
*
VIN(max)
VOUT
Dmax
+
1
*
VIN(min)
VOUT
Both duty cycles will actually be higher due to power loss
in the conversion. The exact duty cycles will depend on
conduction and switching losses. If the maximum input
voltage is higher than the output voltage, the minimum duty
cycle will be negative. This is because a boost converter
cannot have an output lower than the input. In situations
where the input is higher than the output, the output will
follow the input, minus the diode drop of the output diode
and the converter will not attempt to switch.
If the calculated Dmax is higher the Dmax of the NCV8877,
the conversion will not be possible. It is important for a boost
converter to have a restricted Dmax, because while the ideal
conversion ration of a boost converter goes up to infinity as
D approaches 1, a real converter’s conversion ratio starts to
decrease as losses overtake the increased power transfer. If
the converter is in this range it will not be able to regulate
properly.
If the following equation is not satisfied, the device will
skip pulses at high VIN:
Dmin
fs
w
ton(min)
Where: fs: switching frequency [Hz]
ton(min): minimum on time [s]
2. Select Operating Frequency
The default setting is an open ROSC pin, allowing the
oscillator to operate at the default frequency Fs. Adding a
resistor to GND increases the switching frequency.
The graph in Figure 17, below, shows the required
resistance to program the frequency. From 200 kHz to
500 kHz, the following formula is accurate to within 3% of
the expected
100
90
80
70
60
50
40
30
20
10
0
150 200 250 300 350 400 450 500 550
FSW (kHz)
Figure 17. ROSC vs. FSW
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11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet NCV8877.PDF ] | |
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