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PDF NVD4805N Data sheet ( Hoja de datos )
| Número de pieza | NVD4805N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NTD4805N, NVD4805N
Power MOSFET
30 V, 88 A, Single N−Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Applications
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (RqJA) (Note 1)
Power Dissipation
(RqJA) (Note 1)
Continuous Drain
Current (RqJA) (Note 2)
Power Dissipation
(RqJA) (Note 2)
Continuous Drain
Current (RqJC)
(Note 1)
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
VDSS
VGS
ID
PD
ID
PD
ID
30 V
±20 V
17.4 A
13.5
2.65 W
12.7 A
9.8
1.41 W
95 A
73
Power Dissipation
(RqJC) (Note 1)
TC = 25°C
Pulsed Drain Current tp=10ms TA = 25°C
Current Limited by Package
TA = 25°C
Operating Junction and Storage Temperature
PD
IDM
IDmaxPkg
TJ, Tstg
79
175
45
−55 to
175
W
A
A
°C
Source Current (Body Diode)
Source Current (Body Diode) Pulsed tp=20 ms
Drain to Source dV/dt
IS
ISM
dV/dt
55 A
175 A
6.0 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 24 V, VGS = 10 V,
L = 1.0 mH, IL(pk) = 24 A, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
EAS 288 mJ
TL 260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 8
1
http://onsemi.com
V(BR)DSS
30 V
RDS(on) MAX
5.0 mW @ 10 V
7.4 mW @ 4.5 V
D
ID MAX
88 A
N−Channel
G
S
4
4
12
3
DPAK
CASE 369AA
(Bent Lead)
STYLE 2
1
2
3
IPAK
CASE 369D
(Straight Lead DPAK)
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
A = Assembly Location*
Y = Year
WW = Work Week
4805N = Device Code
G = Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
Publication Order Number:
NTD4805N/D
1 page  
NTD4805N, NVD4805N
TYPICAL PERFORMANCE CURVES
5000
4000
VDS = 0 V VGS = 0 V
Ciss
TJ = 25°C
3000
Ciss
2000 Crss
1000
Coss
0 Crss
10 5 0 5 10 15 20 25
VGS
VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
VDD = 15 V
ID = 30 A
VGS = 11.5 V
100
td(off)
tr
10 td(on)
tf
1
1
1000
10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
10 ms
100
100 ms
10
1
0.1
0.1
VGS = 20 V
SINGLE PULSE
TC = 25°C
1 ms
10 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
7
6
5
4 Q1
QT
Q2
3
2
1
ID = 30 A
VGS = 4.5 V
0 TJ = 25°C
0 5 10 15 20 25
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
0
0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
450
ID = 29 A
400
350
300
250
200
150
100
50
0
25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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| PDF Descargar | [ Datasheet NVD4805N.PDF ] | |
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