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PDF NVB60N06 Data sheet ( Hoja de datos )
| Número de pieza | NVB60N06 | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTB60N06, NVB60N06
Power MOSFET
60 V, 60 A, N−Channel D2PAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
Features
• AEC−Q101 Qualified and PPAP Capable − NVB60N06
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Power Supplies
• Converters
• Power Motor Controls
• Bridge Circuits
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 10 MW)
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (tpv10 ms)
Drain Current
− Continuous @ TA = 25°C
− Continuous @ TA = 100°C
− Single Pulse (tpv10 ms)
Total Power Dissipation @ TA = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (Note 1)
Operating and Storage Temperature Range
VDSS
VDGR
VGS
VGS
60
60
"20
"30
Vdc
Vdc
Vdc
ID
ID
IDM
PD
TJ, Tstg
60
42.3
180
150
1.0
2.4
−55 to
+175
Adc
Apk
W
W/°C
W
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 75 Vdc, VGS = 10 Vdc, L = 0.3 mH
IL(pk) = 55 A, VDS = 60 Vdc)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
EAS 454 mJ
RqJC
RqJA
TL
°C/W
1.0
62.5
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu Area 0.412 in2).
http://onsemi.com
60 VOLTS, 60 AMPERES
RDS(on) = 14 mW
N−Channel
D
G
S
MARKING
DIAGRAM
4
Drain
4
D2PAK
NTx60N06
2
CASE 418B
STYLE 2
AYWW
3
1
Gate
2
Drain
3
Source
NTx60N06
x
A
Y
WW
= Device Code
= P or B
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 0
1
Publication Order Number:
NTP60N06/D
1 page  
NTB60N06, NVB60N06
12
10
8
Q1
6
4
QT
Q2
VGS
1000
VDS = 30 V
ID = 60 A
VGS = 10 V
tr
100 tf
td(off)
2 ID = 60 A
TJ = 25°C
00 10 20 30 40 50 60 70
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and Drain−to−Source
Voltage versus Total Charge
td(on)
10
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
60
50
VGS = 0 V
TJ = 25°C
40
TJ = 150°C
30
20 TJ = 25°C
10
0
0.4 0.48 0.56 0.64 0.72 0.8 0.88 0.96
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal
Resistance−General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10 ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) − TC)/(RqJC).
A Power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
currents below rated continuous ID can safely be assumed to
equal the values indicated.
http://onsemi.com
5
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| PDF Descargar | [ Datasheet NVB60N06.PDF ] | |
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