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부품번호 | NVR5198NLT1G 기능 |
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기능 | Power MOSFET ( Transistor ) | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 6 페이지수
NVR5198NL
Power MOSFET
60 V, 155 mW, Single N−Channel Logic
Level, SOT−23
Features
• Small Footprint Industry Standard Surface Mount SOT−23 Package
• Low RDS(on) for Low Conduction Losses and Improved Efficiency
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
VDSS 60 V
Gate−to−Source Voltage
VGS ±20 V
Continuous Drain
C(Nuortreesnt1R, 2Y,J−3m, abnd 4)
Steady
State
TA = 25°C
TA = 100°C
ID
2.2 A
1.6
Power Dissipation
(RNYoJt−emsb1 and 3)
TA = 25°C
TA = 100°C
PD
1.5 W
0.6
Continuous Drain
Current
(Note 1,
R2q, J3A,
and
4)
Steady
State
TA = 25°C
TA = 100°C
ID
1.7 A
1.2
Power
(Notes
Dissipation
1 and 3)
RqJA
Pulsed Drain Current
TA = 25°C
TA = 100°C
TA = 25°C,
tp = 10 ms
PD
IDM
0.9 W
0.4
27 A
Operating Junction and Storage Temperature
TJ, −55 to °C
Tstg 150
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IS 1.9 A
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
http://onsemi.com
V(BR)DSS
60 V
RDS(on) TYP
155 mW @ 10 V
205 mW @ 4.5 V
ID MAX
2.2 A
N−Channel
D
G
S
3
1
2
SOT−23
CASE 318
STYLE 21
MARKING DIAGRAM/
PIN ASSIGNMENT
Drain
3
AAL M G
G
1
Gate
2
Source
AAL = Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
Package
Shipping†
NVR5198NLT1G
SOT−23
(Pb−Free)
3000 /
Tape & Reel
NVR5198NLT3G
SOT−23
(Pb−Free)
10000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 1
1
Publication Order Number:
NVR5198NL/D
NVR5198NL
TYPICAL CHARACTERISTICS
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
−50
−25
0
ID = 250 mA
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Threshold Voltage Variation with
Temperature
10,000
1000
100
10
TJ = 150°C
TJ = 125°C
TJ = 85°C
1
0 5 10 15 20 25 30 35 40 45 50 55 60
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 8. Drain−to−Source Leakage Current
vs. Voltage
275
250
225
200 CISS
175
150
125
TJ = 25°C
f = 1 MHz
VGS = 0 V
100
75
50 COSS
25
0
CRSS
0 5 10 15 20 25 30 35 40 45 50 55
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 9. Capacitance Variation
60
12
11
10
9
8
7
6
5
4 QGS
3
2
1
0
0 0.5
VDS
QGD
1.0 1.5 2.0
QT
VGS
2.5 3.0 3.5
60
55
50
45
40
35
30
25
VDS = 48 V
ID = 1 A
TJ = 25°C
20
15
10
5
0
4.0 4.5 5.0 5.5
QG, TOTAL GATE CHARGE (nC)
Figure 10. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
100
VDD = 30 V
10
TJ = 150°C
td(off)
ID = 1 A
VGS = 10 V
TJ = 125°C
10 tr
TJ = 100°C
td(on)
1 TJ = 85°C
tf
1
0.1
1
10 100
RG, GATE RESISTANCE (W)
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
TJ = 25°C TJ = −55°C
0.1
0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 12. Diode Forward Voltage vs. Current
http://onsemi.com
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부품번호 | 상세설명 및 기능 | 제조사 |
NVR5198NLT1G | Power MOSFET ( Transistor ) | ON Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |