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NVD6824NLT4G 데이터시트 PDF




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기능 Power MOSFET ( Transistor )
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NVD6824NLT4G 데이터시트, 핀배열, 회로
NVD6824NL
Power MOSFET
100 V, 20 mW, 41 A, Single NChannel
Features
Low RDS(on) to Minimize Conduction Losses
High Current Capability
Avalanche Energy Specified
AECQ101 Qualified
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
DraintoSource Voltage
GatetoSource Voltage
Continuous Drain Cur-
rent RqJC (Note 1)
Power Dissipation
(Note 1)
RqJC
Continuous Drain Cur-
rent RqJA (Notes 1 & 2)
Power
(Notes
Dissipation
1 & 2)
RqJA
Pulsed Drain Current
Current Limited by
Package (Note 3)
TC = 25°C
Steady TC = 100°C
State TC = 25°C
TC = 100°C
TA = 25°C
Steady TA = 100°C
State TA = 25°C
TA = 100°C
TA = 25°C, tp = 10 ms
TA = 25°C
VDSS
VGS
ID
PD
ID
PD
IDM
IDmaxpkg
100
"20
41
29
90
45
8.5
6.0
3.9
1.9
238
60
V
V
A
W
A
W
A
A
Operating Junction and Storage Temperature
TJ, Tstg
55 to
175
°C
Source Current (Body Diode)
IS 41 A
Single Pulse DraintoSource Avalanche
Energy (TJ = 25°C, VGS = 10 V,
IL(pk) = 40 A, L = 0.1 mH, RG = 25 W)
EAS 80 mJ
Lead Temperature for Soldering Purposes
(1/8from case for 10 s)
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
JunctiontoCase Steady State (Drain)
RqJC
1.7 °C/W
JunctiontoAmbient Steady State (Note 2)
RqJA
39
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surfacemounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
http://onsemi.com
V(BR)DSS
100 V
RDS(on)
20 mW @ 10 V
23 mW @ 4.5 V
D
ID
41 A
NChannel
G
S
4
12
3
DPAK
CASE 369C
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENT
4
Drain
2
1 Drain 3
Gate Source
Y
WW
6824L
G
= Year
= Work Week
= Device Code
= PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
NVD6824NLT4G DPAK 2500/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
March, 2013 Rev. 1
1
Publication Order Number:
NVD6824NL/D




NVD6824NLT4G pdf, 반도체, 판매, 대치품
NVD6824NL
5000
4000
3000
Ciss
TYPICAL CHARACTERISTICS
VGS = 0 V
TJ = 25°C
10
8
6
QT
2000
1000 Coss
0 Crss
0 10 20 30 40 50 60 70 80 90
VDS, DRAINTOSOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
100
1000
VDS = 80 V
ID = 20 A
VGS = 10 V
4 Qgs
Qgd
VDS = 80 V
2 ID = 20 A
TJ = 25°C
0
0 10 20 30 40 50 60 70
QG, TOTAL GATE CHARGE (nC)
Figure 8. GatetoSource Voltage vs. Total
Charge
100
VGS = 0 V
TJ = 25°C
75
100
tr
tf
td(off)
50
25
10
1
td(on)
10
100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
0
0.60 0.70 0.80 0.90 1.00 1.10
VSD, SOURCETODRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
100 VGS = 10 V
Single Pulse
10 TC = 25°C
100 ms
1 ms
10 ms
10 ms
1
0.1 RDS(on) Limit
Thermal Limit
Package Limit
dc
0.01
0.1
1
10 100
VDS, DRAINTOSOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
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NVD6824NLT4G

Power MOSFET ( Transistor )

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