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PDF NGD18N40CLBT4G Data sheet ( Hoja de datos )
| Número de pieza | NGD18N40CLBT4G | |
| Descripción | Ignition IGBT | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NGD18N40CLB,
NGD18N40ACLB
Ignition IGBT, 18 A, 400 V
N−Channel DPAK
This Logic Level Insulated Gate Bipolar Transistor (IGBT) features
monolithic circuitry integrating ESD and Over−Voltage clamped
protection for use in inductive coil drivers applications. Primary uses
include Ignition, Direct Fuel Injection, or wherever high voltage and
high current switching is required.
Features
• Ideal for Coil−on−Plug Applications
• DPAK Package Offers Smaller Footprint for Increased Board Space
• Gate−Emitter ESD Protection
• Temperature Compensated Gate−Collector Voltage Clamp Limits
Stress Applied to Load
• Integrated ESD Diode Protection
• New Design Increases Unclamped Inductive Switching (UIS) Energy
Per Area
• Low Threshold Voltage Interfaces Power Loads to Logic or
Microprocessor Devices
• Low Saturation Voltage
• High Pulsed Current Capability
• Optional Gate Resistor (RG) and Gate−Emitter Resistor (RGE)
• Emitter Ballasting for Short−Circuit Capability
• These are Pb−Free Devices
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Collector−Emitter Voltage
Collector−Gate Voltage
Gate−Emitter Voltage
Collector Current−Continuous
@ TC = 25°C − Pulsed
ESD (Human Body Model)
R = 1500 Ω, C = 100 pF
VCES
VCER
VGE
IC
ESD
430 VDC
430 VDC
18 VDC
15 ADC
50 AAC
kV
8.0
ESD (Machine Model) R = 0 Ω, C = 200 pF
ESD 800 V
Total Power Dissipation @ TC = 25°C
Derate above 25°C
PD 115 Watts
0.77 W/°C
Operating and Storage Temperature Range
TJ, Tstg −55 to
+175
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
www.onsemi.com
18 AMPS, 400 VOLTS
VCE(on) 3 2.0 V @
IC = 10 A, VGE . 4.5 V
C
G RG
RGE
12
3
E
4 DPAK
CASE 369C
STYLE 7
MARKING DIAGRAM
1
Gate
2
Collector
YWW
G18
N40xG
4
Collector
3
Emitter
G18N40x
Y
WW
G
= Device Code
x = B or A
= Year
= Work Week
= Pb−Free Device
ORDERING INFORMATION
Device
Package
Shipping†
NGD18N40CLBT4G DPAK
2500/Tape &
(Pb−Free)
Reel
NGD18N40ACLBT4G DPAK
2500/Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2014
December, 2014 − Rev. 9
1
Publication Order Number:
NGD18N40CLB/D
1 page  
NGD18N40CLB, NGD18N40ACLB
TYPICAL ELECTRICAL CHARACTERISTICS (unless otherwise noted)
3 10000
2.5 IC = 15 A
2 IC = 10 A
1.5
IC = 5 A
1
0.5
TJ = 150°C
1000
100
10
1
Ciss
Coss
Crss
0
3 4 5 6 7 8 9 10
GATE TO EMITTER VOLTAGE (VOLTS)
Figure 7. Collector−to−Emitter Voltage versus
Gate−to−Emitter Voltage
0
0 20 40 60 80 100 120 140 160 180 200
VCE, COLLECTOR TO EMITTER VOLTAGE (VOLTS)
Figure 8. Capacitance Variation
2
1.8
1.6
VTH + 4 σ
VTH
1.4 VTH − 4 σ
1.2
1
0.8
0.6
0.4
0.2
0
−50 −30 −10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
Figure 9. Gate Threshold Voltage versus
Temperature
30
VCC = 50 V
25 VGE = 5.0 V
RG = 1000 Ω
20 L = 1.8 mH
15
L = 3 mH
10 L = 6 mH
5
0
−50 −25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
Figure 10. Minimum Open Secondary Latch
Current versus Temperature
30 12
VCC = 50 V
VCC = 300 V
25
VGE = 5.0 V
10 VGE = 5.0 V
L = 1.8 mH
RG = 1000 Ω
RG = 1000 Ω
tf
20 L = 3 mH
8 IC = 10 A
L = 300 μH
15
L = 6 mH
10
6
4
td(off)
5
0
−50 −25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
Figure 11. Typical Open Secondary Latch
Current versus Temperature
2
0
−50 −30 −10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
Figure 12. Inductive Switching Fall Time
versus Temperature
www.onsemi.com
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| PDF Descargar | [ Datasheet NGD18N40CLBT4G.PDF ] | |
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