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EMI4182MU 데이터시트 PDF




ON Semiconductor에서 제조한 전자 부품 EMI4182MU은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 EMI4182MU 자료 제공

부품번호 EMI4182MU 기능
기능 Common Mode Filter
제조업체 ON Semiconductor
로고 ON Semiconductor 로고


EMI4182MU 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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EMI4182MU 데이터시트, 핀배열, 회로
EMI4182MU
Common Mode Filter with
ESD Protection
Functional Description
The EMI4182MU is an integrated common mode filter providing
both ESD protection and EMI filtering for high speed digital serial
interfaces such as HDMI or MIPI D-PHY.
The EMI4182MU provides protection for two differential data line
pairs in a small RoHS-compliant UDFN10 package.
Features
Highly Integrated Common Mode Filter (CMF) with ESD Protection
provides protection and EMI reduction for systems using High Speed
Serial Data Lines with cost and space savings over discrete solutions
Large Differential Mode Bandwidth with Cutoff Frequency > 2 GHz
High Common Mode Stop Band Attenuation: >25 dB at 700 MHz,
>30 dB at 800 MHz
Provides ESD Protection to IEC61000-4-2 Level 4, ±15 kV Contact
Discharge
Low Channel Input Capacitance Provides Superior Impedance
Matching Performance
Low Profile Package with Small Footprint in UDFN10 2 x 2.5 mm
PbFree Package
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Applications
HDMI/DVI Display in Mobile Phones
MIPI D-PHY (CSI-2, DSI, etc) in Mobile Phones and Digital Still
Cameras
1
External 2
(Connector) 4
5
10
9 Internal
7 (ASIC)
6
3, 8
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MARKING
DIAGRAMS
UDFN10
CASE 517CJ
U2MG
G
U2 = Specific Device Code
M = Date Code
G = PbFree Package
(*Note: Microdot may be in either location)
PIN CONNECTIONS
In_1+
In_1
GND
In_2+
In_2
1
2
3
4
5
10 Out_1+
9 Out_1
8 GND
7 Out_2+
6 Out_2
ORDERING INFORMATION
Device
Package
Shipping
EMI4182MUTAG UDFN10 3000/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Figure 1. EMI4182MU Electrical Schematic
© Semiconductor Components Industries, LLC, 2013
March, 2013 Rev. 0
1
Publication Order Number:
EMI4182MU/D




EMI4182MU pdf, 반도체, 판매, 대치품
EMI4182MU
MIPI DSI (DPHY)
Host
MIPI DSI (DPHY)
Client
EMI4182MU
Evaluation
Board
Figure 7. MIPI DPHY LP Mode Test Setup
Figure 8. EMI4182MU MIPI DPHY LP Mode Measured Results
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EMI4182MU 전자부품, 판매, 대치품
EMI4182MU
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low
a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per
the IEC6100042 waveform. Since the IEC6100042 was written as a pass/fail spec for larger systems such as cell phones
or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor
has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD
pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these screenshots and how to interpret them please refer to On Semiconductor
Application Notes AND8307/D and AND8308/D.
IEC6100042 Spec.
Test
Voltage
First Peak
Current Current at
Current at
IEC6100042 Waveform
Ipeak
100%
Level
(kV)
(A) 30 ns (A) 60 ns (A)
90%
1 2 7.5 4
2
2 4 15 8
3 6 22.5 12
4
6
I @ 30 ns
48
30 16
8
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
ESD Gun
TVS
Oscilloscope
50 W
Cable
50 W
Figure 14. Diagram of ESD Test Setup
100
90 tr
80
70
60
50
PEAK VALUE IRSM @ 8 ms
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE IRSM/2 @ 20 ms
40
30
20 tP
10
0 0 20 40 60
t, TIME (ms)
Figure 15. 8 x 20 ms Pulse Waveform
80
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