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부품번호 | R7F0C011B 기능 |
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기능 | 8-Bit Single-Chip Microcontrollers | ||
제조업체 | Renesas | ||
로고 | |||
The sales of these products are limited for China and Hong Kong.
R7F0C011B, R7F0C012B,
8 R7F0C013B
User’s Manual: Hardware
8-Bit Single-Chip Microcontrollers
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
www.renesas.com
Rev.1.00 Jan 2013
How to Use This Manual
Readers
Purpose
Organization
This manual is intended for user engineers who wish to understand the functions of the
R7F0C011B, R7F0C012B, R7F0C013B and design and develop application systems and
programs for these devices.
The target products are as follows.
• R7F0C011B2DFP
• R7F0C012B2DFP
• R7F0C013B2DFP
This manual is intended to give users an understanding of the functions described in the
Organization below.
The R7F0C011B, R7F0C012B, R7F0C013B manual is separated into two parts: this
manual and the instructions edition (common to the 78K0R Microcontroller).
R7F0C011B, R7F0C012B, R7F0C013B
User’s Manual
(This Manual)
78K/0 Series
User’s Manual
Instructions
• Pin functions
• Internal block functions
• Interrupts
• Other on-chip peripheral functions
• Electrical specifications (target)
• CPU functions
• Instruction set
• Explanation of each instruction
How to Read This Manual
It is assumed that the readers of this manual have general knowledge of electrical
engineering, logic circuits, and microcontrollers.
• To gain a general understanding of functions:
→ Read this manual in the order of the CONTENTS.
• How to interpret the register format:
→ For a bit number enclosed in angle brackets, the bit name is defined as a reserved
word in the assembler, and is defined as an sfr variable using the #pragma sfr
directive in the compiler.
• To know details of the R7F0C011B, R7F0C012B, R7F0C013B Microcontroller instructions:
→Refer to the separate document 78K0 Series Instructions User’s Manual (U12326E).
4페이지 CONTENTS
CHAPTER 1 OUTLINE............................................................................................................................... 1
1.1 Features ....................................................................................................................................... 1
1.2 Applications................................................................................................................................. 2
1.3 Ordering Information .................................................................................................................. 2
1.4 Pin Configuration (Top View)..................................................................................................... 3
1.5 Pin Identification ......................................................................................................................... 5
1.6 Block Diagram ............................................................................................................................. 6
1.7 Outline of Functions ................................................................................................................... 8
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 10
2.1 Pin Function List ....................................................................................................................... 10
2.2 Description of Pin Functions ................................................................................................... 14
2.2.1 P00, P01 (port 0) .......................................................................................................................... 14
2.2.2 P10 to P17 (port 1) ....................................................................................................................... 14
2.2.3 P20 to P23 (port 2) ....................................................................................................................... 16
2.2.4 P30 to P33 (port 3) ....................................................................................................................... 16
2.2.5 P40 and P41 (port 4) .................................................................................................................... 17
2.2.6 P60 and P61 (port 6) .................................................................................................................... 17
2.2.7 P70 and P71 (port 7) .................................................................................................................... 17
2.2.8 P120 to P122 (port 12) ................................................................................................................. 17
2.2.9 VDD, VSS ........................................................................................................................................ 18
2.2.10 RESET.......................................................................................................................................... 18
2.2.11 REGC ........................................................................................................................................... 18
2.2.12 FLMD0 .......................................................................................................................................... 18
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins........................................ 19
CHAPTER 3 CPU ARCHITECTURE ...................................................................................................... 22
3.1 Memory Space ........................................................................................................................... 22
3.1.1 Internal program memory space ................................................................................................... 27
3.1.2 Internal data memory space ......................................................................................................... 29
3.1.3 Special function register (SFR) area ............................................................................................. 29
3.1.4 Data memory addressing.............................................................................................................. 29
3.2 Processor Registers ................................................................................................................. 33
3.2.1 Control registers ........................................................................................................................... 33
3.2.2 General-purpose registers ............................................................................................................ 36
3.2.3 Special function registers (SFRs) ................................................................................................. 38
3.3 Instruction Address Addressing ............................................................................................. 43
3.3.1 Relative addressing ...................................................................................................................... 43
3.3.2 Immediate addressing................................................................................................................... 44
3.3.3 Table indirect addressing.............................................................................................................. 45
3.3.4 Register addressing ...................................................................................................................... 45
3.4 Operand Address Addressing ................................................................................................. 46
3.4.1 Implied addressing........................................................................................................................ 46
3.4.2 Register addressing ...................................................................................................................... 47
3.4.3 Direct addressing.......................................................................................................................... 48
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7페이지 | |||
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