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PDF LPC11U35FHN33-401 Data sheet ( Hoja de datos )

Número de pieza LPC11U35FHN33-401
Descripción 32-bit ARM Cortex-M0 microcontroller
Fabricantes NXP Semiconductors　
Logotipo NXP Semiconductors Logotipo



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LPC11U3x
32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up
to 12 kB SRAM and 4 kB EEPROM; USB device; USART
Rev. 2.2 — 11 March 2014
Product data sheet
1. General description
The LPC11U3x are an ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for
8/16-bit microcontroller applications, offering performance, low power, simple instruction
set and memory addressing together with reduced code size compared to existing 8/16-bit
architectures.
The LPC11U3x operate at CPU frequencies of up to 50 MHz.
Equipped with a highly flexible and configurable full-speed USB 2.0 device controller, the
LPC11U3x brings unparalleled design flexibility and seamless integration to today’s
demanding connectivity solutions.
The peripheral complement of the LPC11U3x includes up to 128 kB of flash memory, up
to 12 kB of SRAM data memory and 4 kB EEPROM, one Fast-mode Plus I2C-bus
interface, one RS-485/EIA-485 USART with support for synchronous mode and smart
card interface, two SSP interfaces, four general purpose counter/timers, a 10-bit ADC,
and up to 54 general purpose I/O pins.
The I/O Handler is a software library-supported hardware engine that can be used to add
performance, connectivity and flexibility to system designs. It is available on the
LPC11U37HFBD64/401. The I/O Handler can emulate serial interfaces such as UART,
I2C, and I2S with no or very low additional CPU load and can off-load the CPU by
performing processing-intensive functions like DMA transfers in hardware. Software
libraries for multiple I/O Handler applications are available on http://www.LPCware.com.
For additional documentation related to the LPC11U3x parts, see Section 15
“References”.
2. Features and benefits
System:
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
Non-Maskable Interrupt (NMI) input selectable from several input sources.
System tick timer.
Memory:
Up to 128 kB on-chip flash program memory with sector (4 kB) and page erase
(256 byte) access.
4 kB on-chip EEPROM data memory; byte erasable and byte programmable;
on-chip API support.
Up to 12 kB SRAM data memory.

1 page




LPC11U35FHN33-401 pdf
NXP Semiconductors
5. Block diagram
LPC11U3x
32-bit ARM Cortex-M0 microcontroller
SWD, JTAG
XTALIN XTALOUT
RESET
LPC11U3x
TEST/DEBUG
INTERFACE
ARM
CORTEX-M0
SYSTEM OSCILLATOR
IRC, WDO
BOD
POR
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
GPIO ports 0/1
IOH_[20:0]
RXD
TXD
DCD, DSR(1), RI(1)
CTS, RTS, DTR
SCLK
CT16B0_MAT[2:0]
CT16B0_CAP[1:0](2)
CT16B1_MAT[1:0]
CT16B1_CAP[1:0](2)
CT32B0_MAT[3:0]
CT32B0_CAP[1:0](2)
CT32B1_MAT[3:0]
CT32B1_CAP[1:0](2)
system bus
slave
HIGH-SPEED
GPIO
I/O master
HANDLER(3)
EEPROM
4 kB
FLASH
40/48/64/96/128 kB
SRAM
8/10/12 kB
PLL0
ROM
16 kB
slave
slave
slave
master
USB PLL
AHB-LITE BUS
USB DEVICE
slave CONTROLLER
slave
AHB TO APB
BRIDGE
USART/
SMARTCARD INTERFACE
10-bit ADC
16-bit COUNTER/TIMER 0
16-bit COUNTER/TIMER 1
32-bit COUNTER/TIMER 0
32-bit COUNTER/TIMER 1
WINDOWED WATCHDOG
TIMER
I2C-BUS
SSP0
SSP1
IOCON
SYSTEM CONTROL
PMU
GPIO pins
GPIO pins
GPIO pins
GPIO INTERRUPTS
GPIO GROUP0 INTERRUPTS
GPIO GROUP1 INTERRUPTS
CLKOUT
USB_DP
USB_DM
USB_VBUS
USB_FTOGGLE,
USB_CONNECT
AD[7:0]
SCL, SDA
SCK0, SSEL0,
MISO0, MOSI0
SCK1, SSEL1,
MISO1, MOSI1
002aag345
(1) Not available on HVQFN33 packages.
(2) CT16B0_CAP1, CT16B1_CAP1 available on LQFP64 packages only; CT32B0_CAP1 available on TFBGA48, LQFP48, and
LQFP64 packages only; CT32B1_CAP1 available in TFBGA48/LQFP64 packages only.
(3) LPC11U37HFBD64/401 only.
Fig 1. Block diagram
LPC11U3X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.2 — 11 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 77

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LPC11U35FHN33-401 arduino
NXP Semiconductors
Table 3. Pin description
Symbol
LPC11U3x
32-bit ARM Cortex-M0 microcontroller
Reset Type Description
state
[1]
PIO0_4/SCL/IOH_2
10 G3 15 20 [4] I; IA I/O
- I/O
PIO0_5/SDA/IOH_3
- I/O
11 H3 16 21 [4] I; IA I/O
- I/O
- I/O
PIO0_6/USB_CONNECT/ 15 H6 22 29 [3] I; PU I/O
SCK0/IOH_4
-O
- I/O
- I/O
PIO0_7/CTS/IOH_5
16 G7 23 30 [5] I; PU I/O
-I
- I/O
PIO0_8/MISO0/
CT16B0_MAT0/R/IOH_6
17 F8 27 36 [3] I; PU
-
-
-
-
I/O
I/O
O
-
I/O
PIO0_9/MOSI0/
CT16B0_MAT1/R/IOH_7
18 F7 28 37 [3] I; PU
-
-
-
-
I/O
I/O
O
-
I/O
PIO0_4 — General purpose digital input/output pin
(open-drain).
SCL — I2C-bus clock input/output (open-drain).
High-current sink only if I2C Fast-mode Plus is
selected in the I/O configuration register.
IOH_2 — I/O Handler input/output 2.
LPC11U37HFBD64/401 only.
PIO0_5 — General purpose digital input/output pin
(open-drain).
SDA — I2C-bus data input/output (open-drain).
High-current sink only if I2C Fast-mode Plus is
selected in the I/O configuration register.
IOH_3 — I/O Handler input/output 3.
LPC11U37HFBD64/401 only.
PIO0_6 — General purpose digital input/output pin.
USB_CONNECT — Signal used to switch an external
1.5 kresistor under software control. Used with the
SoftConnect USB feature.
SCK0 — Serial clock for SSP0.
IOH_4 — I/O Handler input/output 4.
LPC11U37HFBD64/401 only.
PIO0_7 — General purpose digital input/output pin
(high-current output driver).
CTS — Clear To Send input for USART.
IOH_5 — I/O Handler input/output 5.
(LPC11U37HFBD64/401 only.)
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SSP0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
Reserved.
IOH_6 — I/O Handler input/output 6.
(LPC11U37HFBD64/401 only.)
PIO0_9 — General purpose digital input/output pin.
MOSI0 — Master Out Slave In for SSP0.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
Reserved.
IOH_7 — I/O Handler input/output 7.
(LPC11U37HFBD64/401 only.)
LPC11U3X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2.2 — 11 March 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 77

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