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부품번호 | FST16862 기능 |
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기능 | 20-Bit Bus Switch | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 6 페이지수
October 2001
Revised February 2002
FST16862
20-Bit Bus Switch
General Description
The Fairchild Switch FST16862 provides 20-bits of high-
speed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
The device is organized as a 20-bit bus switch. When OEX
is LOW, the switch is ON and Port A is connected to Port B.
When OEX is HIGH, a high impedance state exists
between the A and B Ports.
Features
I 4Ω switch connection between two ports.
I Minimal propagation delay through the switch.
I Low lCC.
I Zero bounce in flow-through mode.
I Control inputs compatible with TTL level.
Ordering Code:
Order Number
Package
Number
Package Description
FST16862QSP MQA48A 48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
(Preliminary)
FST16862MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
© 2002 Fairchild Semiconductor Corporation DS500702
www.fairchildsemi.com
AC Electrical Characteristics
Symbol
Parameter
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
VCC = 4.5 – 5.5V
VCC = 4.0V
Units
Conditions
Figure
Number
Min Max Min Max
tPHL, tPLH
Propagation Delay Bus-to-Bus
(Note 8)
0.25
0.25
ns VI = OPEN
Figures
1, 2
tPZH, tPZL
Output Enable Time
1.0 5.0
5.3 ns VI = 7V for tPZL
VI = OPEN for tPZH
Figures
1, 2
tPHZ, tPLZ
Output Disable Time
1.0 6.0
6.3 ns VI = 7V for tPLZ
VI = OPEN for tPHZ
Figures
1, 2
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance (Note 9)
Symbol
Parameter
Typ
CIN Control Pin Input Capacitance
3
CI/O Input/Output Capacitance “OFF State”
6
Note 9: TA = +25°C, f = 1 Mhz, Capacitance is characterized but not tested.
Max
Units
pF
pF
Conditions
VCC = 5.0V, VIN = 0V
VCC, OE = 5.0V, VIN = 0V
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
www.fairchildsemi.com
FIGURE 2. AC Waveforms
4
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다운로드 | [ FST16862.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
FST16861 | 20-Bit Bus Switch | Fairchild Semiconductor |
FST16861MTD | 20-Bit Bus Switch | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |