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AR9287 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 AR9287
기능 Single-Chip 2x2 MIMO MAC/BB/Radio
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AR9287 데이터시트, 핀배열, 회로
Data Sheet
February 2010
AR9287 Single-Chip 2x2 MIMO MAC/BB/Radio with PCIE
Interface for 802.11n 2.4 GHz WLANs
General Description
The Atheros AR9287 is a highly integrated
single-chip solution for 2.4 GHz 802.11n-ready
WLANs to enable high-performance 2x2 MIMO
configurations for applications demanding
robust link quality and maximum throughput
and range. The AR9287 integrates a multi-
protocol MAC, baseband processor, analog-to-
digital and digital-to-analog (ADC/DAC)
converters, 2x2 MIMO radio transceiver
including LNA, PA, and RF switch, and PCI
Express interface in an all-CMOS device for low
power and small form factor applications.
The AR9287 implements half-duplex OFDM,
CCK, and DSSS baseband processing, supporting
up to 150 Mbps for 20 MHz and 300 Mbps for
40 MHz channel operations respectively, and
IEEE 802.11b/g data rates. Additional features
include signal detection, automatic gain control,
frequency offset estimation, symbol timing, and
channel estimation. The AR9287 MAC supports
the 802.11 wireless MAC protocol, 802.11i
security, receive and transmit filtering, error
recovery, and quality of service (QoS).
The AR9287 supports two simultaneous traffic
streams using up to two integrated transmit
chains and receive chains for high throughput
and range performance. Transmit chains combine
baseband in-phase (I) and quadrature (Q) signals,
convert them to the desired frequency, and drive
the RF signal to multiple antennas. Receive
chains convert RF signal to baseband I and Q
outputs. The frequency synthesizer supports
one-MHz steps to match frequencies defined by
IEEE 802.11b/g/n specifications.
The AR9287 supports frame data transfer to and
from the host using a PCIE interface providing
interrupt generation and reporting, power save,
and status reporting. Other external interfaces
include serial EEPROM and GPIOs. The AR9287
operates with standard legacy 802.11b/g devices.
Features
All-CMOS MIMO solution interoperable with
IEEE 802.11b/g/n WLANs
2x2 MIMO technology improves effective
throughput and range over existing
802.11b/g products
Integrated LNAs, PAs, and RF switches
eliminate the need for external front-end
modules
Supports spatial multiplexing, cyclic-delay
diversity (CDD), and maximal ratio
combining (MRC)
2.4 GHz WLAN MAC/BB processing
BPSK, QPSK, 16 QAM, 64 QAM, DBPSK,
DQPSK, and CCK modulation schemes
Data rates of up to 150 Mbps for 20 MHz
channels and 300 Mbps for 40 MHz channels
Wireless multimedia enhancements for QoS
802.11e-compatible bursting
Support for IEEE 802.11e, h, and i standards
WEP, TKIP, and AES hardware encryption
20 and 40 MHz channelization
PCIE 1.1 compliant
Support for 2–3 wire Bluetooth coexistence
Reduced (short) guard interval
Frame aggregation
Block ACK
IEEE 1149.1 standard test access port and
boundary scan architecture supported
9 mm x 9 mm 76-pin LPCC package
AR9287 System Block Diagram
© 2009-2010 by Atheros Communications, Inc. All rights reserved. Atheros®, Atheros Driven®, Align®, Atheros XR®, Driving the Wireless Future®, Intellon®, No New Wires®,
Orion® , PLC4Trucks®, Powerpacket®, Spread Spectrum Carrier®, SSC®, ROCm®, Super A/G®, Super G®, Super N®, The Air is Cleaner at 5-GHz®, Total 802.11®, U-Nav®,
Wake on Wireless®, Wireless Future. Unleashed Now.®, and XSPAN®, are registered by Atheros Communications, Inc. Atheros SST™, Signal-Sustain Technology™, Ethos™,
Install N Go™, IQUE™, ROCm™, amp™, Simpli-Fi™, There is Here™, U-Map™, U-Tag™, and 5-UP™ are trademarks of Atheros Communications, Inc. The Atheros logo is a
registered trademark of Atheros Communications, Inc. All other trademarks are the property of their respective holders. Subject to change without notice.
COMPANY CONFIDENTIAL
1




AR9287 pdf, 반도체, 판매, 대치품
7.2.4 DCU Registers ............................. 76
7.2.5 MAC Interface ............................. 86
7.2.6 EEPROM Interface Registers ..... 87
7.2.7 Host Interface Registers ............. 87
7.2.8 RTC Interface Registers ............. 99
7.2.9 MAC PCU Registers ................. 103
7.2.10 Wake-on-Wireless Register ..... 129
8 Electrical Characteristics .......... 133
8.1 Absolute Maximum Ratings .............. 133
8.2 Recommended Operating Conditions 133
8.3 40 MHz Clock Characteristics ............ 134
8.4 GPIO DC Electrical Characteristics ... 134
8.5 PCIE Pin Characteristics ..................... 135
8.6 Power Up Sequencing ......................... 136
8.7 EEPROM Timing Specifications ........ 137
8.8 Radio Characteristics ........................... 138
8.8.1 Receiver Characteristics ........... 138
8.8.2 Transmitter Characteristics ..... 139
8.8.3 Synthesizer Characteristics ..... 140
8.9 Power Consumption Parameters ....... 140
9 Package Dimensions ................. 141
10 Ordering Information .............. 143
2 • AR9287 Single-Chip 2x2 MIMO MAC/BB/Radio for 802.11n WLANs
2 February 2010
Atheros Communications, Inc.
COMPANY CONFIDENTIAL

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AR9287 전자부품, 판매, 대치품
Table 1-1. Signal-to-Pin Relationships and Descriptions
Symbol
PCIE
PCIE_CLKREQ_L
PCIE_REFCLK_N
PCIE_REFCLK_P
PCIE_RST_L
PCIE_RX_N
PCIE_RX_P
PCIE_TX_N
PCIE_TX_P
PCIE_WAKE_L
Radio
BIASREF
Pin
27
30
31
32
35
36
33
34
16
76
RF2ION_0
RF2IOP_0
RF2ION_1
63
62
69
RF2IOP_1
70
Analog Interface
PA2BIASN_0
65
PA2BIASP_0
PA2BIASN_1
60
67
PA2BIASP_1
PDET_0
72
58
PDET_1
XPA2BIAS_0
74
52
XPA2BIAS_1
53
External Switch Control
SWCOM0
47
SWCOM1
SWCOM2
46
45
SWCOM3
43
General
RST_L
2
XTALI
XTALO
5
4
Type Description
OD Clock request, for starting and stopping the PCIE clock
IA Differential reference clock (100 MHz)
IA
I PCIE reset
IA Differential receive
IA
OA Differential transmit
OA
OD PCIE power management
OA BIASREF voltage is 310 mV; must connect a
6.19 KΩ ± 1% resistor to ground
IA/OA Differential RF inputs/outputs at 2.4 GHz for chain 0.
IA/OA Use one side for single-ended input.
IA/OA Differential RF inputs/outputs at 2.4 GHz for chain 1.
Use one side for single-ended input.
IA/OA
IA External bias for 2.4 GHz for chain 0
IA
IA External bias for 2.4 GHz for chain 1
IA
IA Connect to external power detectors outputs
IA
OA Bias for external power amplifier for chain 0
OA Bias for external power amplifier for chain 1
O Common switch control
O
O
O
IH Reset for the AR9287
I Crystal oscillator input and output
O See “40 MHz Clock Characteristics” on page 134
Atheros Communications, Inc.
COMPANY CONFIDENTIAL
AR9287 Single-Chip 2x2 MIMO MAC/BB/Radio for 802.11n WLANs • 3
February 2010 3

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