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부품번호 | FSTUD32211 기능 |
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기능 | 40/48-Bit Bus Switch with -2V Undershoot Protection and Level Shifting (Preliminary) | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
Preliminary
February 2001
Revised August 2001
FSTUD32211
40/48-Bit Bus Switch with -2V Undershoot Protection
and Level Shifting (Preliminary)
General Description
The Fairchild Switch FSTUD32211 provides up to 48-bits
of high-speed CMOS TTL-compatible bus switching. The
low On Resistance of the switch allows inputs to be con-
nected to outputs without adding propagation delay or gen-
erating additional ground bounce noise. A diode to VCC has
been integrated into the circuit to allow for level shifting
between 5V inputs and 3.3V outputs.
The device can be organized as four 12-bit, two 24-bit, or
one 48-bit bus switch. When routed as a 40-bit bus switch,
the device can be organized as four 10-bit, two 20-bit or
one 40-bit bus switch. When OE1 is LOW, the switch is ON
and Port 1A is connected to Port 1B. When OE2 is LOW,
the switch is ON and Port 2A is connected to Port 2B.
When OE3 is LOW, the switch is ON and Port 3A is con-
nected to Port 3B. When OE4 is LOW, the switch is ON and
Port 4A is connected to Port 4B. When OE1, OE2, OE3, or
OE4 are HIGH, a high impedance state exists between the
A and B Ports. The A and B Ports are protected against
undershoot to support an extended range to 2.0V below
ground. Fairchild’s integrated Undershoot Hardened Circuit
(UHC) senses undershoot at the I/O’s, and responds by
preventing voltage differentials from developing and turn-
ing on the switch.
Features
s Undershoot protected to −2V (A and B Ports)
s Voltage level shifting
s 4Ω switch connection between two ports
s Minimal propagation delay through the switch
s Low lCC
s Zero bounce in flow-through mode
s Control inputs compatible with TTL level
s See Applications Notes AN-5008 and AN-5021 for UHC
details
s Packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number Package Number
Package Description
FSTUD32211GX
(Note 1)
BGA114A
(Preliminary)
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
Note 1: BGA package available in Tape and Reel only.
© 2001 Fairchild Semiconductor Corporation DS500537
www.fairchildsemi.com
Preliminary
Absolute Maximum Ratings(Note 2)
Supply Voltage (VCC)
0.5V to +7.0V
DC Switch Voltage (VS) (Note 3)
−2V to +7.0V
DC Input Control Pin Voltage (VIN)(Note 4) −0.5V to +7.0V
DC Input Diode Current (lIK) VIN < 0V
−50 mA
DC Output (IOUT)
128 mA
DC VCC/GND Current (ICC/IGND)
+/− 100 mA
Storage Temperature Range (TSTG)
−65°C to +150 °C
Recommended Operating
Conditions (Note 5)
Power Supply Operating (VCC)
Input Voltage (VIN)
Output Voltage (VOUT)
Input Rise and Fall Time (tr, tf)
Switch Control Input
4.5V to 5.5V
0V to 5.5V
0V to 5.5V
0 ns/V to 5 ns/V
Switch I/O
0 ns/V to DC
Free Air Operating Temperature (TA)
-40°C to +85°C
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 3: VS is the voltage observed/applied at either A or B Ports across the
switch.
Note 4: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 5: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = −40 °C to +85 °C
Min Typ Max
Units
(Note 6)
Conditions
VIK Clamp Diode Voltage
VIH HIGH Level Input Voltage
VIL LOW Level Input Voltage
VOH HIGH Level
II Input Leakage Current
4.5
4.5 - 5.5
4.5 - 5.5
4.5 - 5.5
5.5
0
IOZ OFF-STATE Leakage Current
RON Switch On Resistance
(Note 7)
5.5
4.5
4.5
4.5
ICC Quiescent Supply Current
5.5
∆ ICC
Increase in ICC per Input
VIKU
Voltage Undershoot
Note 6: Typical values are at VCC = 5.0V and TA= +25°C
5.5
5.5
−1.2
2.0
0.8
See Figure 4
±1.0
10
±1.0
47
47
35 50
1.5
10
2.5
−2.0
V IIN = −18 mA
V
V
V
µA 0 ≤ VIN ≤ 5.5V
µA VIN = 5.5V
µA 0 ≤ A, B ≤ VCC
Ω VIN = 0V, IIN = 64 mA
Ω VIN = 0V, IIN = 30 mA
Ω VIN = 2.4V, IIN = 15 mA
mA OE1 = OE2 = GND
VIN = VCC or GND, IOUT = 0
µA OE1 = OE2 = VCC
VIN = VCC or GND, IOUT = 0
mA One Input at 3.4V
Other Inputs at VCC or GND
V 0.0 mA ≥ IIN ≥ −50 mA
OE1,2 = 5.5V
Note 7: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
4
4페이지 Output Voltage HIGH vs. Supply Voltage
Preliminary
FIGURE 4.
7
www.fairchildsemi.com
7페이지 | |||
구 성 | 총 8 페이지수 | ||
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부품번호 | 상세설명 및 기능 | 제조사 |
FSTUD32211 | 40/48-Bit Bus Switch with -2V Undershoot Protection and Level Shifting (Preliminary) | Fairchild Semiconductor |
FSTUD32211GX | 40/48-Bit Bus Switch with -2V Undershoot Protection and Level Shifting (Preliminary) | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |