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UC1854B PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 UC1854B
기능 Enhanced High Power Factor Preregulator
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UC1854B 데이터시트, 핀배열, 회로
Enhanced High Power Factor Preregulator
UC1854A/B
UC2854A/B
UC3854A/B
FEATURES
Controls Boost PWM to Near Unity
Power Factor
Limits Line Current Distortion To <3%
World-Wide Operation Without Switches
Accurate Power Limiting
Fixed Frequency Average Current Mode
Control
High Bandwidth (5MHz), Low Offset
Current Amplifier
Integrated Current and Voltage Amp
Output Clamps
Multiplier Improvements: Linearity,
500mV VAC Offset (eliminates external
resistor), 0-5V Multout Common Mode
Range
VREF "GOOD" Comparator
Faster and Improved Accuracy ENABLE
Comparator
UVLO Threshold Options
(16/10V / 10.5/10V)
300µA Startup Supply Current
UVLO Turn on UVLO Turn off
UC1854A
16V
10V
UC1854B
10.5V
10V
DESCRIPTION
The UC1854A/B products are pin compatible enhanced versions of the
UC1854. Like the UC1854, these products provide all of the functions
necessary for active power factor corrected preregulators. The
controller achieves near unity power factor by shaping the AC input line
current waveform to correspond to the AC input line voltage. To do this
the UC1854A/B uses average current mode control. Average current
mode control maintains stable, low distortion sinusoidal line current
without the need for slope compensation, unlike peak current mode
control.
The UC1854A/B products improve upon the UC1854 by offering a wide
bandwidth, low offset Current Amplifier, a faster responding and
improved accuracy enable comparator, a VREF "good" comparator,
UVLO threshold options (16/10V for offline, 10.5/10V for startup from
an auxiliary 12V regulator), lower startup supply current, and an
enhanced multiply/divide circuit. New features like the amplifier output
clamps, improved amplifier current sinking capability, and low offset
VAC pin reduce the external component count while improving
performance. Improved common mode input range of the Multiplier
output/Current Amp input allow the designer greater flexibility in
choosing a method for current sensing. Unlike its predecessor, RSET
controls only oscillator charging current and has no effect on clamping
the maximum multiplier output current. This current is now clamped to
a maximum of 2 * IAC at all times which simplifies the design process
and provides foldback power limiting during brownout and extreme low
line conditions.
A 1% 7.5V reference, fixed frequency oscillator, PWM, Voltage
Amplifier with softstart, line voltage feedforward (VRMS squarer), input
supply voltage clamp, and over current comparator round out the list of
features.
BLOCK DIAGRAM
6/98
UDG-93001-1




UC1854B pdf, 반도체, 판매, 대치품
UC1854A/B
UC2854A/B
UC3854A/B
ELECTRICAL
CHARACTERISTICS (cont.)
Unless otherwise stated, VCC=18V, RT=8.2k, CT=1.5nF, PKLMT=1V, VRMS=1.5V, IAC=100µA,
ISENSE=0V, CA Out=3.5V, VA Out=5V, VSENSE=3V, –55oC<TA<125oC for the UC1854A/B,
–40oC<TA<85oC for the UC2854A/B, and 0oC<TA<70oC for the UC3854A/B, and TA=TJ.
PARAMETER
GATE DRIVER
Output High Voltage
Output Low Voltage
Output Low (UVLO)
Output Rise / Fall Time
Output Peak Current
TEST CONDITIONS
IOUT = –200mA, VCC = 15V
IOUT = 200mA
IOUT = 10mA
IOUT = 50mA, VCC = 0V
CLOAD = 1nF, (Note 1)
CLOAD = 10nF, (Note 1)
MIN TYP MAX UNITS
12 12.8
V
1 2.2 V
300 500 mV
0.9 1.5
V
35 ns
1.0 A
Note 1: Guaranteed by design, not 100% tested in production.
Note
2:
Gain
constant
(K)
=
IAC × (Va
VRMS 2
×
1.5V)
IMO
FUNCTIONAL DESCRIPTION
The UC1854A/B products were designed as pin
compatible upgrades to the industry standard UC1854
active Power Factor correction circuits. The circuit
enhancements allow the user to eliminate in most cases
several external components currently required to
successfully apply the UC1854. In addition, linearity
improvements to the Multiply, Square, and Divide circuitry
optimizes overall system performance. Detailed
descriptions of the circuit enhancements are provided
below. For in-depth design applications reference data
refer to Unitrode application notes U-134 and DN-44.
MULTIPLY / SQUARE AND DIVIDE
The UC1854A/B Multiplier design maintains the same
gain constant (K = 1), as the UC1854. The relationship
between the inputs and output current is given as:
IMO = IAC(VAO - 1.5V) / KVRMS2
This is nearly the same as the UC1854, but circuit
differences have improved the performance and
application.
The first difference is with the IAC input. The UC1854A/B
regulates this pin voltage to a nominal 500mV over the full
operating temperature range, rather than the 6.0V used
on the UC1854. This low offset voltage eliminates the
need for a line zero crossing compensating resistor to
VREF from IAC that UC1854 designs require. The
maximum current at high line into IAC should be limited to
250µA for best performance. Therefore, if VAC (max) =
270V, then RAC = 270(1.414) / 250µA = 1.53M.
The VRMS pin linear operating range is improved with the
UC1854A/B as well. The input range for VRMS extends
from 0 to 5.5V. Since the UC1854A squaring circuit
employs an analog multiplier, rather than a linear
approximation, accuracy is improved, and discontinuities
are eliminated. The external divider network connected to
VRMS should produce 1.5V at low line (85VAC). This will
put 4.77V on VRMS at high line (27VAC) which is well
within its operating range.
The Voltage Amplifier output forms the third input to the
Multiplier and is internally clamped to 6.0V. This
eliminates an external zenerclamp often used in UC1854
designs. The offset voltage at this input to the Multiplier
has been raised on the UC1854A/B to 1.5V.
The Multiplier output pin, which is also common to the
Current Amplifier non-inverting input, has a 0.3V to 5.0V
output range,compared to the 0.3 to 2.5V range of the
UC1854. This improvement allows the UC1854A/B to be
used in applications where the current sense signal
amplitude is very large.
VOLTAGE AMPLIFIER
The UC1854A/B Voltage Amplifier design is essentially
similar to the UC1854 with two exceptions. The first is with
the internal connection. The lower voltage reduces the
amount of charge on the compensation capacitor, which
provides improved recovery from large signal events,
such as line dropouts, or power interruption. It also
minimizes the DC current flowing through the feedback.
The output of the Voltage amplifier is also changed. In
addition to a 6.0V temperature compensated clamp, the
output short circuit current has been lowered to 2mA
typical, and an active pull down has replaced the passive
pulldown of the UC1854.
CURRENT AMPLIFIER
The Current Amplifier for an average current PFC
controller needs a low offset voltage in order to minimize
AC line current distortion. With this in mind, the
UC1854A/B Current Amplifier has improved the input
offset voltage from ±4mV to 0 to 3mV. The negative
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UC1854B 전자부품, 판매, 대치품
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright © 1999, Texas Instruments Incorporated

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