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PDF S-8254A Data sheet ( Hoja de datos )
| Número de pieza | S-8254A | |
| Descripción | BATTERY PROTECTION IC | |
| Fabricantes | Seiko Instruments | |
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S-8254A Series
www.sii-ic.com
© Seiko Instruments Inc., 2002-2014
BATTERY PROTECTION IC
FOR 3-SERIAL- OR 4-SERIAL-CELL PACK
Rev.5.1_00
The S-8254A Series is a protection IC for 3-serial- or 4-serial-cell lithium-ion / lithium polymer rechargeable
batteries and includes a high-accuracy voltage detector and delay circuit.
The S-8254A Series protects both 3-serial or 4-serial cells using the SEL pin for switching.
Features
(1) High-accuracy voltage detection for each cell
• Overcharge detection voltage n (n = 1 to 4)
• Overcharge release voltage n (n = 1 to 4)
3.9 V to 4.4 V (50 mV step)
3.8 V to 4.4 V*1
Accuracy ±25 mV
Accuracy ±50 mV
• Overdischarge detection voltage n (n = 1 to 4) 2.0 V to 3.0 V (100 mV step) Accuracy ±80 mV
• Overdischarge release voltage n (n = 1 to 4) 2.0 V to 3.4 V*2
Accuracy ±100 mV
(2) Three-level overcurrent protection
• Overcurrent detection voltage 1
0.05 V to 0.30 V (50 mV step) Accuracy ±25 mV
• Overcurrent detection voltage 2
0.5 V
Accuracy ±100 mV
• Overcurrent detection voltage 3
VVC1 − 1.2 V
Accuracy ±300 mV
(3) Delay times for overcharge detection, overdischarge detection and overcurrent detection 1 can be set
by external capacitors (delay times for overcurrent detection 2 and 3 are fixed internally).
(4) Switchable between a 3-serial cell and 4-serial cell using the SEL pin
(5) Charge/discharge operation can be controlled via the control pins.
(6) High-withstand voltage device
Absolute maximum rating : 26 V
(7) Wide operating voltage range
2 V to 24 V
(8) Wide operating temperature range −40°C to + 85°C
(9) Low current consumption
• During operation 30 μA max. (+25°C)
• During power-down 0.1 μA max. (+25°C)
(10) Lead-free, Sn100%, halogen-free*3
*1. Overcharge hysteresis voltage n (n = 1 to 4) can be selected as 0 V or from a range of 0.1 V to 0.4 V in
50 mV steps.
(Overcharge hysteresis voltage = Overcharge detection voltage − Overcharge release voltage)
*2. Overdischarge hysteresis voltage n (n = 1 to 4) can be selected as 0 V or from a range of 0.2 V to 0.7 V
in 100 mV steps.
(Overdischarge hysteresis voltage = Overdischarge release voltage − Overdischarge detection voltage)
*3. Refer to “ Product Name Structure” for details.
Applications
• Lithium-ion rechargeable battery packs
• Lithium polymer rechargeable battery packs
Package
• 16-Pin TSSOP
Seiko Instruments Inc.
1
1 page  
Rev.5.1_00
BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK
S-8254A Series
Pin Configuration
16-Pin TSSOP
Top view
COP
VMP
DOP
VINI
CDT
CCT
VSS
NC
1
2
3
4
5
6
7
8
16 VDD
15 VC1
14 VC2
13 VC3
12 VC4
11 CTL
10 SEL
9 NC
Figure 2
Table 2
Pin No.
Symbol
Description
1 COP FET gate connection pin for charge control (Nch open drain output)
2
VMP
Pin for voltage detection between VC1 and VMP (Pin for overcurrent 3
detection)
3 DOP FET gate connection pin for discharge control FET (CMOS output)
4
VINI
Pin for voltage detection between VSS and VINI (Pin for overcurrent detection
1,2)
5
CDT
Capacitor connection pin for delay for overdischarge detection, delay for
overcurrent detection 1
6
CCT
Capacitor connection pin for delay for overcharge current
7
VSS
Input pin for negative power supply,
Connection pin for battery 4’s negative voltage
8
NC *1
No connection
9
NC *1
No connection
10
SEL
Pin for switching 3-series or 4-series cell
VSS level: 3-series cell, VDD level : 4-series cell
11 CTL Control of charge FET and discharge FET
12
VC4
Connection pin for battery 3’s negative voltage,
Connection pin for battery 4’s positive voltage
13
VC3
Connection pin for battery 2’s negative voltage,
Connection pin for battery 3’s positive voltage
14
VC2
Connection pin for battery 1’s negative voltage,
Connection pin for battery 2’s positive voltage
15
VC1
Connection pin for battery 1’s positive voltage
16
VDD
Input pin for positive power supply,
Connection pin for battery 1’s positive voltage
*1. The NC pin is electrically open. The NC pin can be connected to VDD or VSS.
Seiko Instruments Inc.
5
5 Page 
Rev.5.1_00
BATTERY PROTECTION IC FOR 3-SERIAL- OR 4-SERIAL-CELL PACK
S-8254A Series
4. 0 V Battery Charge Starting Charger Voltage (Product with 0 V Battery Charge Function), 0 V
Battery Charge Inhibition Battery Voltage (Product with 0 V Battery Charge Inhibition Function)
(Test circuit 4)
Either the 0 V battery charge starting charger voltage or the 0 V battery charge inhibition battery voltage
is applied to each product according to the 0 V battery charging function.
4. 1 0 V Battery Charge Starting Battery Charger Voltage (V0CHA) (Product with 0 V Battery Charge
Function)
The starting condition is V1 = V2 = V3 = V4 = 0 V for a product in which 0 V battery charging is
available. The COP pin voltage should be lower than V0CHA max. − 1 V when the VMP pin voltage
VVMP = V0CHA max.
4. 2 0 V Battery Charge Inhibition Battery Voltage (V0INH) (Product with 0 V Battery Charge
Inhibition Function)
The starting condition is V1 = V2 = V3 = V4 = V0INH for a product in which 0 V battery charging is
inhibited. The COP pin voltage should be higher than VVMP − 1 V when the VMP pin voltage VVMP =
24 V.
5. Resistance between VMP and VDD, Resistance between VMP and VSS, VC1 Pin Current, VC2 Pin
Current, VC3 Pin Current, VC4 Pin Current, CTL pin Current “H”, CTL Pin Current “L”, SEL Pin
Current “H”, SEL Pin Current “L”, COP Pin Leakage Current, COP Pin Sink Current, DOP Pin
Source Current, DOP Pin Sink Current
(Test circuit 5)
VVMP = VSEL = VDD, VINI = VCTL = VSS, V1 = V2 = V3 = V4 = 3.5 V, and other pins left “open” (this status is
referred to as the initial status).
5. 1 Resistance between VMP and VDD (RVMD)
The resistance between VMP and VDD (RVMD) is obtained from RVMD = VDD / IVMD using the current
value of the VMP pin (IVMD) when VVMP is VSS after the initial status.
5. 2 Resistance between VMP and VSS (RVMS)
The resistance between VMP and VSS (RVMS) is obtained from RVMS = VDD / IVMS using the current
value of the VMP pin (IVMS) when V1 = V2 = V3 = V4 = 1.8 V after the initial status.
5. 3 VC1 Pin Current (IVC1), VC2 Pin Current (IVC2), VC3 Pin Current (IVC3), VC4 Pin Current (IVC4)
At the initial status, the current that flows through the VC1 pin is the VC1 pin current (IVC1), the current
that flows through the VC2 pin is the VC2 pin current (IVC2), the current that flows through the VC3 pin
is the VC3 pin current (IVC3), and the current that flows through the VC4 pin is the VC4 pin current
(IVC4).
5. 4 CTL pin Current “H” (ICTLH), CTL Pin Current “L” (ICTLL)
In the initial status, the current that flows through the CTL pin is the CTL pin current “L” (ICTLL), after
that, when VCTL = VDD, the current that flows through the CTL pin is the CTL pin current “H” (ICTLH).
5. 5 SEL Pin Current “H” (ISELH), SEL Pin Current “L” (ISELL)
In the initial status, the current that flows through the SEL pin is the SEL pin current “H” (ISELH), after
that, when VSEL = VSS, the current that flows through the SEL pin is the SEL pin current “L” (ISELL).
Seiko Instruments Inc.
11
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| PDF Descargar | [ Datasheet S-8254A.PDF ] | |
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