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부품번호 | CH7512B 기능 |
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기능 | DP to LVDS Monitor Controller | ||
제조업체 | Chrontel | ||
로고 | |||
Chrontel
CH7512B
Brief Datasheet
CH7512B DP to LVDS Monitor Controller
FEATURES
• Supports DisplayPort Specification version 1.1a
• Support 2 Main Link Lanes at either 1.62Gb/s or
2.7Gb/s link rate for notebook PC applications
• Supports input color depth 6, 8-bit per pixel in RGB
format
• Supports Enhanced Framing Mode
• Support VESA and CEA timing standards up to
1920x1200 resolution in 8-bit input with 60Hz refresh
rate
• HDCP engine compliant with HDCP 1.3 specification
with internal HDCP Keys
• Support dynamic refresh rate switching
• Support Gamma correction
• Panel tuning methods including dithering and 6-bit +
FRC
• Fast and full Link Training for DisplayPort system
• 2 work modes: connect 27MHz crystal, inject 27MHz
clock
• Programmable LCD panel power sequence
• Support 18-bit Single Port, 18-bit Dual Port, 24-bit
Single Port and 24-bit Dual Port LVDS output interface
• Support both OpenLDI and SPWG bit mapping for
LVDS application
• Support panel select by GPIO pins control or writing
the chip registers.
• Flexible LVDS output pins swapping
• Blank panel during invalid input
• Supports PWM. Backlight luminance level control
through AUX channel, PWM pin and BLUP/BLDN pin
Support Dynamic Backlight Control
• Support OSD display when BLUP/BLDN pins control
Backlight Luminance
• Hot Plug Detection
• Loads Boot ROM automatically upon power up
• Serial BOOT ROM data updated through I2C bus or
AUX Channel
• Programmable power management
• EMI reduction capability for DP input and LVDS
output. Spread spectrum control is available for
transmitting LVDS signal
• Offered in a 68-pin QFN package
GENERAL DESCRIPTION
Chrontel’s CH7512B is a low-cost, low-power semiconductor
device that translates the DisplayPort signal to the LVDS (Low-
voltage Differential Signaling). This innovative DisplayPort
receiver with an integrated LVDS transmitter is specially
designed to target the All-In-One PC and the notebook market
segments. Through the CH7512B’s advanced decoding /
encoding algorithm, the input DisplayPort high-speed serialized
video data can be seamlessly converted to LVDS, a popular
display technology for high-speed serial links in mid/large-sized
LCD displays. Leveraging the DisplayPort’s unique source/sink
“Link Training” routine, the CH7512B is capable of instantly
bring up the video display to the LCD when the initialization
process is completed between CH7512B and the graphic chip.
The CH7512B is designed to meet the DisplayPort Specification
1.1a. In the device’s receiver block, which supports two
DisplayPort Main Link Lanes input with data rate running at
either 1.62Gb/s or 2.7Gb/s, can accept RGB digital formats in
either 18-bit 6:6:6 or 24-bit 8:8:8 for LVDS output up to
1920x1200. To comply with GPU’s new power saving scheme
such as display frame rate reduction, the CH7512B is equipped
with the Dynamic Refresh Rate switching method, which can
automatically reduce to the low refresh rate supported by the
LVDS panel.
The integrated LVDS transmitter supports the single port and
the dual ports LVDS outputs to drive display resolution up to
WUXGA (1920x1200). CH7512B supports panel select by
GPIO[0:3] pins control or writing the chip registers. To reduce
EMI emission, the CH7512B’s LVDS encoder block has
incorporated Spread Spectrum control and its spread percentage
can be adjusted through the internal registers.
The Backlight On/Off and the PWM are two luminance control
functions designed in the CH7512B LVDS power control
module. The brightness control commands sent through AUX
Channel can be dynamically translated by CH7512B and
converted into LCD backlight control signal. The CH7512B will
save the last setting of brightness level into the BOOT ROM and
restore it upon power up. The CH7512B can dynamically adjust
backlight brigntness according to video stream to save power
consumption and it supports OSD display in this way.
The CH7512B will immediately convert the DisplayPort signal
to LVDS output after DisplayPort Link Training is completed.
This feature can be achieved by loading the panel’s EDID and
the CH7512B’s configuration settings in the serial BOOT ROM
connected to the CH7512B. During system power-up and upon
completion of the DisplayPort Link Training through AUX
Channel, CH7512B will generate LVDS signal according to the
panel power-up timing sequencing stored in the BOOT ROM.
209-1000-041 Rev. 1.12 07/18/2013
1
CHRONTEL
Pin #
Type Symbol
33~34,
37~38
In
GPIO[3:0]
36 Out IRQ
39 Out PWM_OUT1
41
43,44
46
47
48
In PWRDN
In/Out AUXP,
AUXN
Out ENABKL
Out ENAVDD
Out PWM_OUT0
49 In PWM_IN
50 In/Out SPD1
51 Out SPC1
53 In/Out SPD0
54 In SPC0
55 In BLDN
56 In BLUP
57 Out GLED
4
CH7512B
Description
LL1CP/N and LL2CP/N are used as CLK1 and CLK2 respectively.
Panel Select Control Signals
These pins could be pulled high (10 KΩ resistor to +3.3V) or low forming into
16 different combinations. Every combination can match with one panel type.
Programmable Interrupt output
Output an interrupt signal while there’s input from BLDN or BLUP.
PWM Output for Backlight Brightness Dimming
PWM Duty Cycle Range: 30~100%(16 steps)
The output Frequency from PWM_OUT1 can be up to 400KHz. Voltage level
is 3.3V.
Power Down Control
CH7512B enters/exit power down state when receiving active low pulse (0V)
from this pin.
AUX Channel Differential Input/Output
These two pins are DisplayPort AUX Channel control, which supports a half-
duplex, bi-directional AC-coupled differential signal.
LCD Panel Backlight Enable
Enable backlight of LCD panel (3.3V)
LCD Panel VCC Enable
Enable LCD panel VDD (3.3V)
PWM Output for Backlight Brightness Dimming / Bypass PWM_IN
PWM Duty Cycle Range: 0~100%(16 steps)
The output Frequency from PWM_OUT0 can be up to 400KHz. Voltage level
is 3.3V.
Bypass PWM input, and while in bypass mode, frequency of PWM_OUT0
can be up to 1MHz.
Backlight brightness PWM input
PWM_IN has two work modes: Bypass mode and Duty Cycle Multiplication
with AUX CH mode.
In bypass mode, the input frequency to PWM_IN can be up to 1MHz.
In Duty Cycle Multiplication with AUX CH mode, the input frequency to
PWM_IN can be up to 50KHz.
Voltage level is 3.3V.
Serial Port Data Input/Output for Chip BOOT ROM/EDID
This pin functions as the bi-directional data pin of the serial port and operates
with inputs from 0 to 3.3V. Outputs are driven from 0 to 3.3V. This pin
requires an external 4KΩ - 9 KΩ pull up resistor to 3.3V.
Serial Port Clock Output for Chip BOOT ROM/EDID
This pin functions as the clock output of the serial port and operates with
output from 0 to 3.3V. This pin requires an external 4KΩ - 9KΩ pull up
resistor to 3.3V.
Serial Port Data Input/Output for Register Map
This pin is used to access CH7512B internal registers. It functions as the bi-
directional data pin of the serial port and operates with input from 0 to 3.3V.
Output is driven from 0 to 3.3V. This pin requires an external 6KΩ - 8 KΩ
pull up resistor to 3.3V.
Serial Port Clock Input for Register Map
This pin is used to access CH7512B internal registers. It functions as the
clock input of the serial port and operates with input from 0 to 3.3V. This pin
requires an external 6KΩ - 8 KΩ pull up resistor to 3.3V.
Decrement Backlight Brightness Input
Increment Backlight Brightness Input
Green LED Control
This pin indicates CH7512B in normal power and mode status. Its output
voltage is 3.3V.
209-1000-041 Rev. 1.12 07/18/2013
4페이지 CHRONTEL
Disclaimer
CH7512B
This document provides technical information for the user. Chrontel reserves the right to make changes at any time
without notice to improve and supply the best possible product and is not responsible and does not assume any
liability for misapplication or use outside the limits specified in this document. We provide no warranty for the use
of our products and assume no liability for errors contained in this document. The customer should make sure that
they have the most recent data sheet version. Customers should take appropriate action to ensure their use of the
products does not infringe upon any patents. Chrontel, Inc. respects valid patent rights of third parties and does not
infringe upon or assist others to infringe upon such rights.
Chrontel PRODUCTS ARE NOT AUTHORIZED FOR AND SHOULD NOT BE USED WITHIN LIFE SUPPORT
SYSTEMS OR NUCLEAR FACILITY APPLICATIONS WITHOUT THE SPECIFIC WRITTEN CONSENT OF
Chrontel. Life support systems are those intended to support or sustain life and whose failure to perform when used
as directed can reasonably expect to result in personal injury or death.
Part Number
CH7512B-BF
ORDERING INFORMATION
Package Type
68QFN, Lead-free
Operating Temperature
Range
Commercial : -20 to 70°C
Minimum Order
Quantity
260/TRAY
Chrontel
Chrontel International Limited
129 Front Street, 5th floor,
Hamilton, Bermuda HM12
www.chrontel.com
E-mail: [email protected]
©2013 Chrontel - All Rights Reserved.
209-1000-041 Rev. 1.12 07/18/2013
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부품번호 | 상세설명 및 기능 | 제조사 |
CH7512B | DP to LVDS Monitor Controller | Chrontel |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |