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PDF LD7830 Data sheet ( Hoja de datos )
| Número de pieza | LD7830 | |
| Descripción | High Power Factor Flyback LED Controller | |
| Fabricantes | Leadtrend | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LD7830 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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LD7830
8/17/2012
High Power Factor Flyback LED Controller with HV Start-up
REV: 01a
General Description
The LD7830 is a HV start-up Flyback PFC controller,
specially designed for LED lighting appliances. It operates
in transition(TM) mode and integrates with complete
protections required for safety and therefore it’s an
excellent solution to minimize the components counts.
Those make it ideal for cost- effective applications.
With HV start-up technology, high power factor and TM
control, the start-up time and resistor loss could be
minimized efficiently. The circuit can easily achieve
PF>0.90 to meet most of the international standard
requirements.
With completed protection built inside this IC, such as
over voltage protection (OVP), over current protection
(OCP), over load protection (OLP), over temperature
protection (OTP), and short circuit protection (SCP), It
enable the circuit to meet most safety requirements either
in normal and abnormal test.
Features
High voltage (600V) startup circuit
High Power Factor Flyback PFC controller
High-efficiency Transition mode operation
Wide UVLO (16Von and 7.5 Voff)
VCC OVP (Over Voltage Protection)
OLP (Over Load Protection)
OCP (Cycle by cycle current limiting) Vcs=0.5V
Internal OTP (Over Temperature Protection)
500/-800mA Driving Capability
Internal OTP function
Applications
LED Power Supply
Flyback PFC Power Supply
Typical Application
LF1
AC
Input
EMI
CF1ilter
LED+
LED-
VCC
HV
GATE
CS
LD7830 COMP
ZCD
GND
Leadtrend Technology Corporation
LD7830-DS-01a August 2012
1
www.leadtrend.com.tw
VSEN
GND ISEN
1.25V 0.1V
LD8105
IREF
VCC
OUT
LED+
1 page  
LD7830
Electrical Characteristics
(VCC=15.0V, TA = 25C unless otherwise specified.)
PARAMETER
CONDITIONS
High voltage Supply(HV Pin)
High-voltage current Source
VCC=4V , HV=80V
VCC=9V,HV=80V
Off-state Leakage current
VCC>UVLO(ON), HV=500V
Supply Voltage (VCC Pin)
Startup Current
VCC<UVLO ON
Operating Current
(with 1nF load on OUT pin)
VCOMP=0V, ZCD=0
VCOMP=3V, ZCD=0
VCC OVP
OLP
UVLO (OFF)
UVLO (ON)
HV Self Bias (Linear Regulator)
De-Latch VCC Voltage
PDR( Power Down Reset)
VCC OVP Level
Voltage Feedback(Comp Pin)
Short circuit current
VCOMP=0
Open loop voltage
OLP Trip Level
Zero ON-time Threshold
Zero ON-time Hysteresis
OLP Delay Time
OLP De-Latch Counter
Current Sensing (CS Pin)
Current Sense Input Threshold Voltage
Soft Start Time
IZCD<110A
IZCD>440A
*
Input bias current
LEB time
VCS=0V~0.5V
MIN TYP MAX UNITS
1.0 1.3 1.6 mA
2.6 3.1 3.6 mA
0 35 A
55 75 95
1
1.45
0.3
0.3
6.9 7.5 8.1
15.0 16 17.0
8.1 8.8 9.5
6.0 6.5 7.0
25 26 27
A
mA
mA
mA
mA
V
V
V
V
V
0.4 0.5 0.6 mA
5.0 5.3 5.8
V
4.65 4.8 4.95
V
0.8 V
25 mV
225 270 315 ms
4 Cycle
0.47 0.5 0.53
0.322 0.35 0.378
8
0 1.5
240 300 360
V
V
ms
A
ns
Leadtrend Technology Corporation
LD7830-DS-01a August 2012
5
www.leadtrend.com.tw
5 Page 
LD7830
OUT
RAMP
IPEAK
Primary
Current
Secondary
Current
TON
VCOMP
TDIS
-nAUX/nS ∙VOUT
0A
0A
AUX
Voltage
-nAUX/nP ∙ VIN
ZCD
Voltage
VOUT
Delay Time
-nAUX/nS ∙VOUT RZ1/(RZ1+RZ2)
0V
0.1V
-0.3V-Clamp
VDS
Minimum
Voltage Turn-on
0V
Fig. 16
Programming Maximum ON-time
LD7830 features adjustable maximum ON-time to limit
power output in abnormal operation. The selection of
maximum ON-time is subject to ZCD resistance as shown
in Fig. 17. ZCD resistance can be obtained from below:
RZ1
NVcc
RZ2
ZCD
RZCD
32k<RZCD
28k<RZCD<32k
24k<RZCD<28k
20k<RZCD<24k
16k<RZCD<20k
12k<RZCD<16k
8k<RZCD<12k
RZCD<8k
Max. Ton
Suggestion
(Typ.)
16s
36k
12.8s
30k
10.7s
26k
9.1s
22k
8.0s
18k
7.1s
14k
6.4s
10k
5.8s
6k
High/ Low Line OCP Compensation
LD7830 supports high/low line OCP compensation
through aux-winding to reflect the magnitude of input
voltage. When gate turns on, ZCD pin will source the
current IZCD to clamp the voltage to zero as shown in
Fig.18. According to this current information, OCP trigger
level VCS-OFF will be determined by RZ1 and input voltage.
In order to avoid ZCD pin over rating, IZCD must be set
less than 2mA. IZCD-max can be calculated as below:
IZCDMAX
NP
VINPK
/ NVCC RZ1
2mA
NVcc
RZ1
IZCD
ZCD
RZ2
RZCD
RZ1 RZ2
RZ1 RZ2
Fig. 17
Fig. 18
The following table is a suggestion for maximum ON-time
setting.
Leadtrend Technology Corporation
LD7830-DS-01a August 2012
11
www.leadtrend.com.tw
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet LD7830.PDF ] | |
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