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PDF U74HC4094 Data sheet ( Hoja de datos )

Número de pieza U74HC4094
Descripción 8-STAGE SHIFT & STORE BUS REGISTER
Fabricantes Unisonic Technologies 
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No Preview Available ! U74HC4094 Hoja de datos, Descripción, Manual

UNISONIC TECHNOLOGIES CO., LTD
U74HC4094
8-STAGE SHIFT & STORE BUS
REGISTER
„ DESCRIPTION
The U74HC4094 consists of an 8-stage shift register and an
8-stage D-type latch with 3-stage parallel outputs. Data is shifted
serially through the shift register on the positive-going clock
transition of the input singal. The output of the last stage QS1 can
be used to cascade several devices.
The output of QS1 is transferred to a second output(QS2)
on the following negative-going clock transition of the input singal.
The data of each stage of the shift register is provided with a latch
whose data on the negative going transition of the Strobe input
signal. When the strobe input is held high, data propagates
through the latch to a 3-state output buffer.
The buffer is enabled when Output Enable input is taken
high.
„ FEATURES
* Operate from 2.0V to 6.0V
* Low Power Dissipation ICC=4μA(Max)
* High Noise Immunity Characteristic of CMOS Devices
„ ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
U74HC4094L-S16-R
U74HC4094G-S16-R
U74HC4094L-P16-R
U74HC4094G-P16-R
U74HC4094L-P16-T
U74HC4094G-P16-T
Package
SOP-16
TSSOP-16
TSSOP-16
CMOS IC
SOP-16
TSSOP-16
Packing
Tape Reel
Tape Reel
Tube
www.unisonic.com.tw
Copyright © 2012 Unisonic Technologies Co., Ltd
1 of 6
QW-R502-645.B

1 page




U74HC4094 pdf
U74HC4094
CMOS IC
„ SWITCHING CHARACTERISTICS(TA=25,see TEST CIRCUIT AND WAVEFORMS)
PARAMETER
Propagation delay from input
(CP) to output(QS1)
SYMBOL
tPHL/tPLH
Propagation delay from input
(CP) to output(QS2)
tPHL/tPLH
Propagation delay from input
(CP) to output(QPn)
tPHL/tPLH
Propagation delay from input
(STR) to output(QPn)
tPHL/tPLH
3-state output enable time from input
(OE) to output(QPn)
tPZH/tPZL
3-state output disable time from
input (OE) to output(QPn)
tPHZ/tPLZ
Output transition time(QSnQPn)
tTLH/ tTHL
Clock pulse width HIGH or LOW(CP)
tW
Strobe pulse width HIGH(STR)
tW
Set-up time(D to CP)
tSU
Set-up time(D to STR)
tSU
Hold time(D to CP)
tH
Hold time(D to STR)
tH
Maximum clock pulse frequency
fMAX
„ OPERATING CHARACTERISTICS
TEST CONDITIONS
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
MIN TYP MAX UNIT
50 150 ns
18 30 ns
14 26 ns
44 135 ns
16 27 ns
13 23 ns
63 195 ns
23 39 ns
18 33 ns
58 180 ns
21 36 ns
17 31 ns
55 175 ns
20 35 ns
16 30 ns
41 125 ns
15 25 ns
12 21 ns
19 75 ns
7 15 ns
6 13 ns
80 14
ns
16 5
ns
14 4
ns
80 14
ns
16 5
ns
14 4
ns
50 14
ns
10 5
ns
94
ns
100 28
ns
20 10
ns
17 8
ns
3 -6
ns
3 -2
ns
3 -2
ns
0 -14
ns
0 -5
ns
0 -4
ns
6 28
MHz
30 87
MHz
35 103
MHz
PARAMETER
Power Dissipation Capacitance
SYMBOL
TEST CONDITIONS
CPD No load
MIN TYP MAX UNIT
300 pF
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 6
QW-R502-645.B

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