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LTM4634 데이터시트 PDF




Linear Technology에서 제조한 전자 부품 LTM4634은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 LTM4634 기능
기능 Triple Output 5A/5A/4A Step-Down DC/DC uModule Regulator
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LTM4634 데이터시트, 핀배열, 회로
Features
n Three Independent High Efficiency Regulator
Channels
n IOUT1,2 = 5A, IOUT3 = 4A
n Input Voltage Range: 4.75V to 28V
n Independent VIN for Each Channel
n VOUT1,2 Voltage Range: 0.8V to 5.5V
n VOUT3 Voltage Range: 0.8V to 13.5V
n ±1.5% Maximum Total DC Output Error
n Current Mode Control/Fast Transient Response
n Frequency Synchronization
n Output Overvoltage and Overcurrent Protection
n PolyPhase® Operation with Current Sharing
n General Purpose Temperature Monitors
n Soft-Start/Voltage Tracking
n Power Good Monitors
n SnPb or RoHS Compliant Finish
n 15mm × 15mm × 5.01mm BGA Package
Applications
n Telecom, Networking and Industrial Equipment
n High Density Point of Load Voltage Regulation
LTM4634
Triple Output 5A/5A/4A
Step-Down DC/DC
µModule® Regulator
Description
The LTM®4634 integrates three complete 5A/5A/4A high
efficiency switching mode DC/DC converters into one small
package. Switching controllers, power FETs, inductors, and
most support components are included. Operating over an
input voltage range of 4.75V to 28V, the LTM4634 provides
three independent output voltages. VOUT1 and VOUT2 are
adjustable from 0.8V to 5.5V, while VOUT3 is adjustable
from 0.8V to 13.5V. Each output voltage is set by a single
external resistor.
High switching frequency and a current mode architecture
enable a very fast transient response to line and load
changes without sacrificing stability. The device supports
frequency synchronization, multiphase parallel opera-
tion, soft-start and output voltage tracking for supply rail
sequencing.
Fault protection features include overvoltage protection,
overcurrent protection and temperature monitoring. The
power module is offered in a space saving, thermally
enhanced 15mm × 15mm × 5.01mm BGA package. The
LTM4634 is available with SnPb (BGA) or RoHS compliant
terminal finish.
L, LT, LTC, LTM, µModule, PolyPhase, Burst Mode, Linear Technology and the Linear logo
are registered trademarks and PowerPath, LTpowerCAD and UltraFast are trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 5705919, 5929620, 6100678, 6144194,
6177787, 6304066, 6580258 and 8163643. Other patents pending.
Typical Application
24V Input to 3.3V, 5V and 12V Output Regulator
24VIN
40k
5V
2Ω VIN1 VIN2 VIN3 EXTVCC INTVCC FREQ/PLLLPF
CNTL_PWR
PGOOD12
10k 10k
4.7µF
6.3V
RUN1
1µF RUN2
RUN3
TK/SS1
TK/SS2
TK/SS3
LTM4634
PGOOD3
VOUT1
VFB1
19.1k
VOUT2
VFB2
11.5k
3.3V
5V
MODE/PLLIN GND SGND
VOUT3
VFB3
4.32k
12V
4634 TA01a
For more information www.linear.com/LTM4634
24V Input Efficiency
100
95
90
85
80
75
70 VEXTVCC = 5V
24V to 3.3V EFF (750kHz) CH1
65 24V to 5V EFF (750kHz) CH2
24V to 12V EFF (750kHz) CH3
60
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
LOAD CURRENT (A)
4634 TA01b
4634f
1




LTM4634 pdf, 반도체, 판매, 대치품
LTM4634
E lectrical Characteristics The l denotes the specifications which apply over the specified internal
operating
channel.
temperature
range
(Note
2),
otherwise
specifications
are
at
TA
=
25°C.
VIN
=
24V,
per
the
typical
application
for
each
regulator
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VPGOOD
PGOOD Trip Level
PGOOD12
PGOOD3
VPGL PGOOD Voltage Low
INTVCC Linear Regulator
VINTVCC
Internal VCC Voltage
VLDOINT
INTVCC Load Regulation
VEXTVCC
EXTVCC Switchover Voltage
VLDOEXT
EXTVCC Voltage Drop
VLDOHYS
EXTVCC Hysteresis
Oscillator and Phase-Locked Loop
VFB With Respect to Set Output
VFB Ramping Negative
VFB Ramping Positive
IPGOOD = 2mA
Float
MODE/PLLIN
6V < VIN < 28V, ICC = 0mA
ICC = 0mA to 100mA
EXTVCC Ramping Positive
ICC = 20mA, VEXTVCC = 5V
–7.5
7.5
0.1 0.3
4.8 5 5.2
1
l 4.5 4.7
30 75
200
%
%
V
V
%
V
mV
mV
fSYNC
fS
RMODE/PLLIN
VIH(MODE/PLLIN)
VIL(MODE/PLLIN)
Clock Phase
VTEMP1,2
TC VTEMP
SYNC Capture Range
Switching Frequency
MODE/PLLIN Input Resistance
Clock Input Level High
Clock Input Level Low
VOUT2 to VOUT1 Phase
VOUT3 to VOUT2 Phase
VOUT1 to VOUT3 Phase
Temperature Diode Forward Voltage
Temperature Coefficient
Clock Input Duty Cycle = 50%
VFREQ/PLLLPF = INTVCC
VFREQ/PLLLPF = 1.2V (Note 3)
ITEMP = 100µA
250 750
700 750 825
250
2.0
0.8
120
120
120
0.598
–2.0
kHz
kHz
V
V
Deg
Deg
Deg
V
mV/°C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4634 is tested under pulsed load conditions such that
TJ ≈ TA. The LTM4634E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4634I is guaranteed to meet specifications over the
–40°C to 125°C internal operating temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3: 100% tested at wafer level.
Note 4: See output current derating curves for different VIN, VOUT and TA.
Note 5: High duty designs need to be validated based on maximum
temperature rise and derating in ambient conditions.
4634f
4 For more information www.linear.com/LTM4634

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LTM4634 전자부품, 판매, 대치품
Typical Performance Characteristics
LTM4634
24V to 5V Full Load Short
VOUT
2V/DIV
IIN
1A/DIV
VIN = 24V
20µs/DIV
VOUT = 5V
IOUT = 5A
COUT = 2 × 100µF X5R 1210
4634 G19
Start-Up into Pre-Bias
RUN
5V/DIV
VOUT1
1V/DIV
SW
10V/DIV
20ms/DIV
4634 G20
PREBIAS 1.5V OUTPUT STARTING AT 0.5V BIAS
12V INPUT
Steady-State Output Ripple
VOUT
RIPPLE
10mV/DIV
SW NODE
5V/DIV
2µs/DIV
12V TO 3.3V AT 5A LOAD
4634 G21
Pin Functions
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
GND (A4, A8-A9, D1- D12, E1-E12, F4, F8, F12, G3-G4,
G7-G8, G11-G12, H3-H4, H7-H8, H11-H12, J1-J5, J7,
J9-J12, K1-K3, K8-K10, K12,L1-L2,L12, M1, M6-M8,
M12): Ground Pins for Both Input and Output Returns.
All ground pins need to connect with large copper areas
underneath the unit.
VOUT1, VOUT2, VOUT3 (A10-A12, B9-B12, and C10-C12);
(A5-A7, B5-B8, C6-C8); (A1-A3, B1-B4, C1-C4): Power
Output Pins. Apply output load between these pins and
the GND pins. Recommend placing output decoupling
capacitance directly between these pins and the GND
pins. See Table 4.
TEMP1 AND TEMP2 (C9, C5): Two Onboard Temperature
Diodes for Monitoring the VBE Junction Voltage Change
with Temperature. Each of these two temperature diode
connected PNP transistors is placed in the middle of
channel 1 and channel 2, and in the middle of channel 2
and channel 3. See the Applications Information section
and an example in Figure 25. Leave floating if not used.
VIN1,VIN2,VIN3 (F9-F10,G9-G10,H9-H10);(F5-F6,G5-
G6,H5-H6);(F1-F2,G1-G2,H1-H2): Power Input Pins.
Apply input voltage between these pins and the GND pins.
Recommend placing input decoupling capacitance directly
between the VIN pins and the GND pins. The VIN paths
can be all combined from one power source, or powered
from independent power sources. See the Applications
Information section.
SW1 (F11), SW2 (F7), SW3 (F3): The internal switch
node for each of the regulator channels for monitoring
the switching waveform. An R-C snubber circuit can be
placed on these pins to ground to eliminate switch node
ringing noise.
CNTL_PWR (J6): Input Supply to an Internal Bias LDO to
Power the Internal Controller and MOSFET Drivers. The
operating voltage range is 4.75V to 28V under all condi-
tions. If the voltage at CNTL_PWR is ≤5.8V, the INTVCC
pin should be tied to CNTL_PWR for optimum efficiency.
If the voltage at CNTL_PWR is >5.8V, leave INTVCC float-
ing with the recommended decoupling capacitor. To
eliminate power loss in the onboard linear regulator and
improve efficiency connect a 5V supply at EXTVCC. Ensure
CNTL_PWR > EXTVCC at all times to avoid reverse polarity
on the internal bias LDO.
For more information www.linear.com/LTM4634
4634f
7

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