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STPLED624 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 STPLED624
기능 N-channel Power MOSFET
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STPLED624 데이터시트, 핀배열, 회로
STDLED624, STFILED624,
STPLED624, STULED624
N-channel 620 V, 2.2 Ω typ., 4.0 A Power MOSFET
in DPAK, I2PAKFP, TO-220 and IPAK packages
Datasheet preliminary data
Features
TAB
3
Order codes VDS
RDS(on)
max
ID PTOT
1
DPAK
t(s)TAB
roduc3
2
1
te PTO-220
123
I²PAKFP
TAB
IPAK
3
2
1
oleFigure 1. Internal schematic diagram
bsD(2,TAB)
STDLED624
STFILED624
STPLED624
STULED624
620 V
2.5 Ω
4.0 A
45 W
20 W
45 W
100% avalanche tested
Extremely high dv/dt capability
Very low intrinsic capacitance
Improved diode reverse recovery
characteristics
Zener-protected
ct(s) - OG(1)
olete ProduS(3)
AM01476v1
Applications
LED lighting applications
Description
These Power MOSFETs boast extremely low on-
resistance, superior dynamic performance and
high avalanche capability, making them suitable
for the buck-boost and flyback topology.
Obs Table 1. Device summary
Order codes
Marking
Package
Packaging
STDLED624
STFILED624
STPLED624
LED624
DPAK
I2PAKFP (TO-281)
TO-220
Tape and reel
Tube
STULED624
IPAK
March 2013
DocID024407 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/22
www.st.com
22




STPLED624 pdf, 반도체, 판매, 대치품
Electrical characteristics
STDLED624, STFILED624, STPLED624, STULED624
2 Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V(BR)DSS
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0
620
V
IDSS
t(s)IGSS
cVGS(th)
roduRDS(on)
Zero gate voltage
VDS = 620 V
drain current (VGS = 0) VDS = 620 V, TC=125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 20 V
Gate threshold voltage VDS = VGS, ID = 50 µA
Static drain-source on-
resistance
VGS = 10 V, ID = 1.4 A
1 µA
50 µA
± 10 µA
3 3.6 4.5 V
2.2 2.5 Ω
olete PSymbol
Parameter
Obsgfs (1)
Forward
transconductance
t(s) -Ciss
Coss
ucCrss
Input capacitance
Output capacitance
Reverse transfer
capacitance
rodCOSS
(1)
eq
Equivalent output
capacitance
te PRG
Intrinsic gate
resistance
le Qg Total gate charge
so Qgs Gate-source charge
Ob Qgd Gate-drain charge
Table 6. Dynamic
Test conditions
Min. Typ. Max. Unit
VDS = 15 V, ID = 1.4 A
- 2.1 - S
395 pF
VDS = 25 V, f = 1 MHz, VGS = 0 - 57 - pF
7 pF
VGS = 0, VDS = 0 to 496 V
f = 1 MHz open drain
VDD = 496 V, ID = 2.7 A,
VGS = 10 V
(see Figure 17)
- 33 - pF
- 10 - Ω
13.5 nC
- 2.7 - nC
7.7 nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Table 7. Switching times
Test conditions
VDD = 310 V, ID =1.7 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 16)
Min.
-
Typ.
9
6.8
22
15.6
Max. Unit
ns
ns
-
ns
ns
4/22 DocID024407 Rev 1

4페이지










STPLED624 전자부품, 판매, 대치품
STDLED624, STFILED624, STPLED624, STULED624
Electrical characteristics
Figure 8. Normalized BVDSS vs temperature
Figure 9. Static drain-source on-resistance
VDS
(norm)
1.10
ID = 1mA
AM15338v1
RDS(on)
(Ohm)
2.4
VGS=10V
AM15332v1
1.05
2.3
2.2
2.1
1
2
0.95
1.9
1.8
0.90
t(s)0.8
-75 -50 -25 0 25 50 75 100 125 TJ(°C)
ucFigure 10. Gate charge vs gate-source voltage
rodVGS
(V) VGS
te P12
VDD=496V
ID=2.5A
VDS
AM15333v1
VDS
(V)
500
ole10 400
bs8 300
- O6 200
t(s)4 100
uc0 0
d0 5 10 15 20 Qg(nC)
roFigure 12. Normalized gate threshold voltage vs
Ptemperature
teVGS(th)
le(norm)
so1.1
ID=250 µA
AM15336v1
Ob 1
1.7
1.6
1.5
01 23
ID(A)
Figure 11. Capacitance variations
C
(pF)
AM15334v1
Ciss
100
10 Coss
Crss
1
0.1 1
10 100 VDS(V)
Figure 13. Normalized on-resistance vs
temperature
RDS(on)
(norm)
2.5
VGS=10V
ID=3.5A
AM15336v1
2
0.9 1.5
0.8 1
0.7
0.6
-75 -50 -25 0 25 50 75 100 125 TJ(°C)
0.5
0
-75 -50 -25 0 25 50 75 100 125 TJ(°C)
DocID024407 Rev 1
7/22

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