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PDF LSN2-T-6-W3 Data sheet ( Hoja de datos )
| Número de pieza | LSN2-T-6-W3 | |
| Descripción | Selectable-Output DC/DC Converters | |
| Fabricantes | Murata | |
| Logotipo |  |
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www.murata-ps.com
Typical Unit
FEATURES
■ User-selectable outputs: 0.75-5V
(D12 models) or 0.75-3.3V (W3 models)
■ 6, 10 or 16A maximum output current
■ Double lead free to RoHS standards
■ Selectable phased start-up sequencing
and tracking
■ Wide range VIN 8.3-14V or 2.4-5.5V
■ Up to 52 Watts total output power
■ Very high efficiency up to 95%
■ Starts up into pre-biased load
■ Fast settling, high di/dt IOUT slew rate
PRODUCT OVERVIEW
These miniature point-of-load (POL) switch-
ing DC/DC converters are ideal regulation and
supply elements for mixed voltage systems. Fully
compatible with the Distributed-power Open
Standards Alliance specification (www.dosa-
power.com), LSN2’s can power CPU’s, program-
mable logic and mixed-voltage systems with little
heat and low noise. A typical application uses a
master isolated 12 or 5Vdc supply and individual
LSN2 converters for local 1.8 and 3.3Vdc sup-
plies. All system isolation resides in the central
supply, leaving lower cost POL regulation at the
load. The LSN2’s can deliver very high power (to
52 Watts) in a tiny area without heat sinking or
external components. They feature quick transient
response (to 25µsec) and very fast current slew
rates (to 20A/µsec).
Pb
Lead-free
construction/attach
LSN2 Series
Non-isolated, DOSA-SIP, 6/10/16A
Selectable-Output DC/DC Converters
ORDERING GUIDE SUMMARY
Model
Vout Range
LSN2-T/6-W3-C
0.75-3.3V
LSN2-T/6-D12
0.75-5V
LSN2-T/6-D12-C
0.75-5V
LSN2-T/6-D12G
0.75-5V
LSN2-T/6-D12-GC
0.75-5V
LSN2-T/6-D12N
LSN2-T/6-D12-NC
LSN2-T/6-D12NG
0.75-5V
0.75-5V
0.75-5V
LSN2-T/6-D12-NGC
0.75-5V
LSN2-T/10-W3-C
0.75-3.3V
LSN2-T/10-D12-C
0.75-5V
LSN2-T/16-W3-C
0.75-3.3V
LSN2-T/16-D12-C
0.75-5V
Iout Range
0-6A
0-6A
0-6A
0-6A
0-6A
0-6A
0-6A
0-6A
0-6A
0-10A
0-10A
0-16A
0-16A
Vin Range
2.4-5.5V
8.3-14V
8.3-14V
8.3-14V
8.3-14V
8.3-14V
8.3-14V
8.3-14V
8.3-14V
2.4-5.5V
8.3-14V
2.4-5.5V
8.3-14V
Ripple/Noise
15mVp-p
15mVp-p
15mVp-p
15mVp-p
15mVp-p
15mVp-p
15mVp-p
15mVp-p
15mVp-p
15mVp-p
30mVp-p
25mVp-p
30mVp-p
Efficiency
94%
93%
93%
93%
93%
93%
93%
93%
93%
95%
95%
95%
94%
INPUT CHARACTERISTICS
Parameter
Voltage Range
Current, full power
Undervoltage Shutdown
Short Circuit Current
Remote On/Off Control
OUTPUT CHARACTERISTICS
Parameter
Voltage
Current
Power Dissipation
Accuracy
Ripple & Noise
Line and Load Regulation
Overcurrent Protection
Overtemperature Protection
Efficiency (minimum)
Efficiency (typical)
Typ. @ 25°C, full load
2.4-5.5 or 8.3-14V
4.22 to 11.12A
Included
60mA
Positive or negative polarity
Notes
5V or 12V nominal models
Model dependent
With autorestart hysteresis
Output is short circuited
Default polarity is positive
Typ. @ 25°C, full load
0.75-3.3 or 0.75-5V
0-6, 0-10 or 0-16A
20, 33, 52W max.
±2% of VNOM
15-75mVpp
±0.03%
Hiccup autorecovery
+115°C shutdown
92-93%
94-95%
Notes
User adjustable, model dependent
Three ranges, model dependent
Three values, model dependent
50% load
Model dependent
Continuous short circuit protection
Model dependent
Model dependent
GENERAL SPECIFICATIONS
Parameter
Transient Response
Operating Temperature Range
Safety (designed to meet)
EMI (designed to meet)
Typ. @ 25°C, full load
25μsec
–40 to +85°C
UL/IEC/EN 60950-1
FCC pt.15, class B
Notes
50% load step to 2% of final value
With 200 lfm airflow
And CSA C22.2-No.234
May need external filter
MECHANICAL CHARACTERISTICS
6 Amp output models
0.50 x 1.00 x 0.275 inches (12.7 x 25.4 x 6.98 mm)
10 & 16 Amp models
0.50 x 2.00 x 0.32 inches (12.7 x 50.8 x 8.13 mm)
For full details go to
www.murata-ps.com/rohs
www.murata-ps.com/support
MDC_LSN2.D01∆ Page 1 of 15
1 page  
+INPUT
COMMON
ON/OFF
CONTROL
VTRACK
INPUT
LSN2 Series
Non-isolated, DOSA-SIP, 6/10/16A
Selectable-Output DC/DC Converters
VCC
PWM
CURRENT
CONTROLLER
SENSE
REFERENCE &
ERROR AMP
Figure 1. LSN2 Series Simplified Schematic
10.5Ω
+OUTPUT
+SENSE
COMMON
VOUT
TRIM
Typical topology is shown
TECHNICAL NOTES
I/O Filtering and Noise Reduction
All models in the LSN2 Series are tested and specified with external 1 || 10µF
ceramic/tantalum output capacitors and a 22µF tantalum input capacitor.
These capacitors are necessary to accommodate our test equipment and
may not be required to achieve desired performance in your application. The
LSN2's are designed with high-quality, high-performance internal I/O caps,
and will operate within spec in most applications with no additional external
components.
In particular, the LSN2's input capacitors are specified for low ESR and are
fully rated to handle the units' input ripple currents. Similarly, the internal out-
put capacitors are specified for low ESR and full-range frequency response.
In critical applications, input/output ripple/noise may be further reduced using
filtering techniques, the simplest being the installation of external I/O caps.
External input capacitors serve primarily as energy-storage devices. They
minimize high-frequency variations in input voltage (usually caused by IR
drops in conductors leading to the DC/DC) as the switching converter draws
pulses of current. Input capacitors should be selected for bulk capacitance
(at appropriate frequencies), low ESR, and high rms-ripple-current ratings.
The switching nature of modern DC/DCs requires that the dc input voltage
source have low ac impedance at the frequencies of interest. Highly inductive
source impedances can greatly affect system stability. Your specific system
configuration may necessitate additional considerations.
www.murata-ps.com/support
MDC_LSN2.D01∆ Page 5 of 15
5 Page 
other method. Several standard sequencing architectures are prevalent. They
are concerned with three factors:
n The time relationship between the Master and Slave voltages
n The voltage difference relationship between the Master and Slave
n The voltage slew rate (ramp slope) of each converter’s output.
For most systems, the time relationship is the dominant factor. The voltage
difference relationship is important for systems very concerned about possible
latchup of programmable devices or overdriving ESD diodes. Lower slew
rates avoid overcurrent shutdown during bypass cap charge-up.
OUTPUT
VOLTAGE
POL A VOUT
POL B VOUT
Staggered
Times
+VOUT
TIME
Figure 8. Coincident or Simultaneous Phasing (Identical Slew Rates)
In Figure 8, two POL’s ramp up at the same rate until they reach their dif-
ferent respective final set point voltages. During the ramp, their voltages are
nearly identical. This avoids problems with large currents flowing between
logic systems which are not initialized yet. Since both end voltages are differ-
ent, each converter reaches it’s setpoint voltage at a different time.
OUTPUT
VOLTAGE
POL A VOUT
POL B VOUT
Coincident
VOUT Times
TIME
Figure 9. Proportional or Ratiometric Phasing (Identical Vout Time)
Figure 9 shows two POLs with different slew rates in order to reach differing
final voltages at about the same time.
OUTPUT
VOLTAGE
LSN2 Series
Non-isolated, DOSA-SIP, 6/10/16A
Selectable-Output DC/DC Converters
POL A VOUT
POL B VOUT
Delayed
VOUT Times
TIME
Figure 10. Staggered or Sequential Phasing—Inclusive (Fixed Delays)
OUTPUT
VOLTAGE
Not Drawn To Scale
POL A VOUT
POL B VOUT
Delayed
VOUT Times
TIME
Figure 11. Staggered or Sequential Phasing—Exclusive (Fixed Cascaded Delays)
Figures 10 and 11 show both delayed start up and delayed final voltages
for two converters. Figure 10 is called “Inclusive” because the later starting
POL finishes inside the earlier POL. The timing in Figure 10 is more easily built
using a combined digital sequence controller and the Sequence/Track pin.
Figure 11 is the same strategy as Figure 10 but with an “exclusive” timing
relationship staggered approximately the same at power-up and power-down.
Operation
To use the Sequence pin after power start-up stabilizes, apply a rising external
voltage to the Sequence input. As the voltage rises, the output voltage will
track the Sequence input (gain = 1). The output voltage will stop rising when
it reaches the normal set point for the converter. The Sequence input may op-
tionally continue to rise without any effect on the output. Keep the Sequence
input voltage below the converter’s input supply voltage.
Use a similar strategy on power down. The output voltage will stay constant
until the Sequence input falls below the set point.
Any strategy may be used to deliver the power up/down ramps. The circuits
below show simple RC networks but you may also use operational amplifiers,
D/A converters, etc.
www.murata-ps.com/support
MDC_LSN2.D01∆ Page 11 of 15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet LSN2-T-6-W3.PDF ] | |
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