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PDF MAX30100 Data sheet ( Hoja de datos )
| Número de pieza | MAX30100 | |
| Descripción | Pulse Oximeter and Heart-Rate Sensor IC | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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MAX30100
EVALUATION KIT AVAILABLE
Pulse Oximeter and Heart-Rate Sensor IC
for Wearable Health
General Description
The MAX30100 is an integrated pulse oximetry and heart-
rate monitor sensor solution. It combines two LEDs, a
photodetector, optimized optics, and low-noise analog
signal processing to detect pulse oximetry and heart-rate
signals.
The MAX30100 operates from 1.8V and 3.3V power sup-
plies and can be powered down through software with
negligible standby current, permitting the power supply to
remain connected at all times.
Applications
●● Wearable Devices
●● Fitness Assistant Devices
●● Medical Monitoring Devices
Ordering Information appears at end of data sheet.
Benefits and Features
●● Complete Pulse Oximeter and Heart-Rate Sensor
Solution Simplifies Design
• Integrated LEDs, Photo Sensor, and
High-Performance Analog Front -End
• Tiny 5.6mm x 2.8mm x 1.2mm 14-Pin Optically
Enhanced System-in-Package
●● Ultra-Low-Power Operation Increases Battery Life for
Wearable Devices
• Programmable Sample Rate and LED Current for
Power Savings
• Ultra-Low Shutdown Current (0.7µA, typ)
●● Advanced Functionality Improves Measurement
Performance
• High SNR Provides Robust Motion Artifact Resil-
ience
• Integrated Ambient Light Cancellation
• High Sample Rate Capability
• Fast Data Output Capability
System Block Diagram
COVER GLASS
10
0.1
RED
HbO2
Hb
IR
NO INK
ADC
CONTROL
SIGNAL
PROCESSING
19-7065; Rev 0; 9/14
1 page  
MAX30100
Pulse Oximeter and Heart-Rate Sensor IC
for Wearable Health
SDA
tLOW
tSU,DAT
SCL
tHD,STA
START CONDITION
tHIGH
tR tF
tHD,DAT
Figure 1. I2C-Compatible Interface Timing Diagram
tSU,STA
tHD,STA
REPEATED START CONDITION
tSP tSU,STO
tBUF
STOP
START
CONDITION CONDITION
www.maximintegrated.com
Maxim Integrated │ 5
5 Page 
MAX30100
Pulse Oximeter and Heart-Rate Sensor IC
for Wearable Health
Interrupt Status (0x00)
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
REG POR
ADDR STATE
R/W
Interrupt
Status
A_FULL
TEMP_
RDY
HR_RDY
SPO2_
RDY
PWR_
RDY
0x00
0X00
R
There are 5 interrupts and the functionality of each is exactly the same: pulling the active-low interrupt pin into its low
state until the interrupt is cleared.
The interrupts are cleared whenever the interrupt status register is read, or when the register that triggered the interrupt
is read. For example, if the SpO2 sensor triggers an interrupt due to finishing a conversion, reading either the FIFO data
register or the interrupt register clears the interrupt pin (which returns to its normal high state), and also clears all the bits
in the interrupt status register to zero.
Bit 7: FIFO Almost Full Flag (A_FULL)
In SpO2 and heart-rate modes, this interrupt triggers when the FIFO write pointer is the same as the FIFO read pointer
minus one, which means that the FIFO has only one unwritten space left. If the FIFO is not read within the next conver-
sion time, the FIFO becomes full and future data is lost.
Bit 6: Temperature Ready Flag (TEMP_RDY)
When an internal die temperature conversion is finished, this interrupt is triggered so the processor can read the tem-
perature data registers.
Bit 5: Heart Rate Data Ready (HR_RDY)
In heart rate or SPO2 mode, this interrupt triggers after every data sample is collected. A heart rate data sample consists
of one IR data point only. This bit is automatically cleared when the FIFO data register is read.
Bit 4: SpO2 Data Ready (SPO2_RDY)
In SpO2 mode, this interrupt triggers after every data sample is collected. An SpO2 data sample consists of one IR and
one red data points. This bit is automatically cleared when the FIFO data register is read.
Bit 3: RESERVED
This bit should be ignored and always be zero in normal operation.
Bit 2: RESERVED
This bit should be ignored and always be zero in normal operation.
Bit 1: RESERVED
This bit should be ignored and always be zero in normal operation.
Bit 0: Power Ready Flag (PWR_RDY)
On power-up or after a brownout condition, when the supply voltage VDD transitions from below the UVLO voltage to
above the UVLO voltage, a power-ready interrupt is triggered to signal that the IC is powered up and ready to collect data.
www.maximintegrated.com
Maxim Integrated │ 11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet MAX30100.PDF ] | |
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