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PDF NCV33074 Data sheet ( Hoja de datos )
| Número de pieza | NCV33074 | |
| Descripción | Single Supply 3.0 V to 44 V Operational Amplifiers | |
| Fabricantes | ON Semiconductor | |
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MC34071,2,4,A
MC33071,2,4,A,
NCV33072,4,A
Single Supply 3.0 V to 44 V
Operational Amplifiers
Quality bipolar fabrication with innovative design concepts are
employed for the MC33071/72/74, MC34071/72/74, NCV33072/74A
series of monolithic operational amplifiers. This series of operational
amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/ms slew rate
and fast settling time without the use of JFET device technology.
Although this series can be operated from split supplies, it is
particularly suited for single supply operation, since the common
mode input voltage range includes ground potential (VEE). With a
Darlington input stage, this series exhibits high input resistance, low
input offset voltage and high gain. The all NPN output stage,
characterized by no deadband crossover distortion and large output
voltage swing, provides high capacitance drive capability, excellent
phase and gain margins, low open loop high frequency output
impedance and symmetrical source/sink AC frequency response.
The MC33071/72/74, MC34071/72/74, NCV33072/74,A series of
devices are available in standard or prime performance (A Suffix)
grades and are specified over the commercial, industrial/vehicular or
military temperature ranges. The complete series of single, dual and
quad operational amplifiers are available in plastic DIP, SOIC, QFN
and TSSOP surface mount packages.
Features
• Wide Bandwidth: 4.5 MHz
• High Slew Rate: 13 V/ms
• Fast Settling Time: 1.1 ms to 0.1%
• Wide Single Supply Operation: 3.0 V to 44 V
• Wide Input Common Mode Voltage Range: Includes Ground (VEE)
• Low Input Offset Voltage: 3.0 mV Maximum (A Suffix)
• Large Output Voltage Swing: −14.7 V to +14 V (with ±15 V
Supplies)
• Large Capacitance Drive Capability: 0 pF to 10,000 pF
• Low Total Harmonic Distortion: 0.02%
• Excellent Phase Margin: 60°
• Excellent Gain Margin: 12 dB
• Output Short Circuit Protection
• ESD Diodes/Clamps Provide Input Protection for Dual and Quad
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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8
1
8
1
PDIP−8
P SUFFIX
CASE 626
SOIC−8
D SUFFIX
CASE 751
WQFN10
MT SUFFIX
CASE 510AJ
14
1
14
1
PDIP−14
P SUFFIX
CASE 646
SOIC−14
D SUFFIX
CASE 751A
14
1
TSSOP−14
DTB SUFFIX
CASE 948G
ORDERING INFORMATION
See detailed ordering and shipping information on page 18 of
this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 21 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 22
1
Publication Order Number:
MC34071/D
1 page  
MC34071,2,4,A MC33071,2,4,A, NCV33072,4,A
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, RL = connected to ground. TA = +25°C, unless otherwise noted.)
A Suffix
Non−Suffix
Characteristics
Symbol Min Typ Max Min Typ Max Unit
Slew Rate (Vin = −10 V to +10 V, RL = 2.0 kW, CL = 500 pF)
AV = +1.0
AV = −1.0
Setting Time (10 V Step, AV = −1.0)
To 0.1% (+1/2 LSB of 9−Bits)
To 0.01% (+1/2 LSB of 12−Bits)
SR V/ms
8.0 10
− 8.0 10
−
− 13 −
− 13 −
ts ms
− 1.1 −
− 1.1 −
− 2.2 −
− 2.2 −
Gain Bandwidth Product (f = 100 kHz)
GBW 3.5 4.5 − 3.5 4.5 − MHz
Power Bandwidth
AV = +1.0, RL = 2.0 kW, VO = 20 Vpp, THD = 5.0%
Phase margin
RL = 2.0 kW
RL = 2.0 kW, CL = 300 pF
Gain Margin
RL = 2.0 kW
RL = 2.0 kW, CL = 300 pF
Equivalent Input Noise Voltage
RS = 100 W, f = 1.0 kHz
Equivalent Input Noise Current
f = 1.0 kHz
BW − 160 − − 160 − kHz
fm Deg
− 60 −
− 60 −
− 40 −
− 40 −
Am dB
− 12 −
− 12 −
− 4.0 −
− 4.0 −
en
− 32 −
− 32 − nV/ √ Hz
in
− 0.22 −
− 0.22 − pA/ √ Hz
Differential Input Resistance
VCM = 0 V
Differential Input Capacitance
VCM = 0 V
Total Harmonic Distortion
AV = +10, RL = 2.0 kW, 2.0 Vpp ≤ VO ≤ 20 Vpp, f = 10 kHz
Channel Separation (f = 10 kHz)
Rin
Cin
THD
−
− 150 −
− 2.5 −
− 0.02 −
− 120 −
− 150 − MW
− 2.5 − pF
− 0.02 −
%
− 120 −
dB
Open Loop Output Impedance (f = 1.0 MHz)
|ZO| − 30 − − 30 − W
Single Supply
3.0 V to 44 V
VCC
1
2
3
4
VEE
Split Supplies
VCC+|VEE|≤44 V
VCC
VCC 1
2
3
VEE 4
VEE
Figure 2. Power Supply Configurations
VCC
7
2-
6
3+
5
1
4
10 k
VEE
Offset nulling range is approximately ± 80 mV with a 10 k
potentiometer (MC33071, MC34071 only).
Figure 3. Offset Null Circuit
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5
5 Page 
MC34071,2,4,A MC33071,2,4,A, NCV33072,4,A
9.0
8.0 TA = -55°C
7.0 TA = 25°C
6.0
TA = 125°C
5.0
Quad device
4.0
0 5.0 10 15 20 25
VCC, |VEE|, SUPPLY VOLTAGE (V)
Figure 34. Supply Current versus
Supply Voltage
105
-PSR (DVEE = +1.5 V)
95
VCC = +15 V
VEE = -15 V
85
75
65
-55
+PSR (DVCC = +1.5 V)
+PSR = 20 Log
-PSR = 20 Log
DVO/ADM
DVCC
DVO/ADM
DVEE
DVCC
-
ADM
+
DVO
DVEE
-25 0 25 50 75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 35. Power Supply Rejection
versus Temperature
120
100 VCC = +15 V
VEE = -15 V
80 TA = 25°C
60
40
20
0
10 20 30 50 70 100 200 300
f, FREQUENCY (kHz)
Figure 36. Channel Separation versus Frequency
70 2.8
60
VCC = +15 V
VEE = -15 V
2.4
50
VCM = 0
TA = 25°C
2.0
40
Voltage
30
1.6
1.2
20 Current
0.8
10 0.4
00
10 100 1.0 k 10 k 100 k
f, FREQUENCY (kHz)
Figure 37. Input Noise versus Frequency
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES
Although the bandwidth, slew rate, and settling time of the
MC34071 amplifier series are similar to op amp products
utilizing JFET input devices, these amplifiers offer other
additional distinct advantages as a result of the PNP
transistor differential input stage and an all NPN transistor
output stage.
Since the input common mode voltage range of this input
stage includes the VEE potential, single supply operation is
feasible to as low as 3.0 V with the common mode input
voltage at ground potential.
The input stage also allows differential input voltages up
to ±44 V, provided the maximum input voltage range is not
exceeded. Specifically, the input voltages must range
between VEE and VCC supply voltages as shown by the
maximum rating table. In practice, although not
recommended, the input voltages can exceed the VCC
voltage by approximately 3.0 V and decrease below the VEE
voltage by 0.3 V without causing product damage, although
output phase reversal may occur. It is also possible to source
up to approximately 5.0 mA of current from VEE through
either inputs clamping diode without damage or latching,
although phase reversal may again occur.
If one or both inputs exceed the upper common mode
voltage limit, the amplifier output is readily predictable and
may be in a low or high state depending on the existing input
bias conditions.
Since the input capacitance associated with the small
geometry input device is substantially lower (2.5 pF) than
the typical JFET input gate capacitance (5.0 pF), better
frequency response for a given input source resistance can
be achieved using the MC34071 series of amplifiers. This
performance feature becomes evident, for example, in fast
settling D−to−A current to voltage conversion applications
where the feedback resistance can form an input pole with
the input capacitance of the op amp. This input pole creates
a 2nd order system with the single pole op amp and is
therefore detrimental to its settling time. In this context,
lower input capacitance is desirable especially for higher
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| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet NCV33074.PDF ] | |
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