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부품번호 | YC122 기능 |
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기능 | ARRAY CHIP RESISTORS | ||
제조업체 | Yageo | ||
로고 | |||
전체 8 페이지수
120
DATA SHEET
ARRAY CHIP RESISTORS
YC/TC 122 (4Pin/2R)
5%, 1%
sizes 2 × 0402
RoHS compliant
Chip Resistor Surface Mount YC/TC SERIES 122 (RoHS Compliant)
Product specification 4
8
MARKING
YC122
TC122
Fig. 1
ynsc008
Fig. 2
ynsc060
No marking
For further marking information, please refer to data sheet “Chip resistors marking”.
CONSTRUCTION
The resistor is constructed on top
of a high-grade ceramic body.
Internal metal electrodes are added
on each end to make the contacts to
the thick film resistive element. The
composition of the resistive element
is a noble metal imbedded into a
glass and covered by a second glass
to prevent environment influences.
The resistor is laser trimmed to the
rated resistance value. The resistor
is covered with a protective epoxy
coat, finally the two external
terminations (matte tin on Ni-
barrier) are added as shown in Fig.3.
OUTLINES
Fig. 3 Chip resistor outlines
overcoat
resistive layer
inner electrode
termination
ceramic substrate YNSC069
DIMENSIONS
Table 1
TYPE
B (mm)
H (mm)
P (mm)
L (mm)
T (mm)
W1 (mm)
W2 (mm)
YC122
0.20 ±0.10
0.21 +0.10/–0.05
0.67 ±0.05
1.00 ±0.10
0.30 ±0.10
0.25 ±0.10
1.00 ±0.10
TC122
0.25 ±0.15
0.30 ±0.05
0.50 ±0.05
1.00 ±0.10
0.30 ±0.10
0.25 ±0.15
1.00 ±0.10
For dimension, please refer to Table 1
YC122 B
HH
TC122 B
PP
LL
T
W1
W2
YNSC068
Fig. 4 YC/TC122 series chip resistors dimension
SCHEMATIC
For dimension, please refer to Fig. 4 and Table 1
Fig. 5 Equivalent circuit diagram
YC122
43
R1 R2
1
R1 = R2
2
TC122
43
R1 R2
1
R1 = R2
2
YNSC067
Oct 20, 2011 V.3
www.yageo.com
4페이지 Chip Resistor Surface Mount YC/TC SERIES 122 (RoHS Compliant)
Product specification 7
8
TEST
Solderability
- Wetting
TEST METHOD
IPC/JEDECJ-STD-002B test B
IEC 60068-2-58
PROCEDURE
REQUIREMENTS
Electrical Test not required
Magnification 50X
SMD conditions:
1st step: method B, aging 4 hours at 155 °C
dry heat
2nd step: leadfree solder bath at 245±3 °C
Dipping time: 3±0.5 seconds
Well tinned (≥95% covered)
No visible damage
- Leaching
IPC/JEDECJ-STD-002B test D
IEC 60068-2-58
Leadfree solder, 260 °C, 30 seconds
immersion time
- Resistance to
Soldering Heat
MIL-STD-202G-method 210F
IEC 60068-2-58
Condition B, no pre-heat of samples
Leadfree solder, 270 °C, 10 seconds
immersion time
Procedure 2 for SMD: devices fluxed and
cleaned with isopropanol
No visible damage
±(1%+0.05 Ω)
<50 mΩ for Jumper
No visible damage
Oct 20, 2011 V.3
www.yageo.com
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