Datasheet.kr   

ATtiny40 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 ATtiny40은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 ATtiny40 자료 제공

부품번호 ATtiny40 기능
기능 8-bit tinyAVR Microcontroller
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


ATtiny40 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 30 페이지수

미리보기를 사용할 수 없습니다

ATtiny40 데이터시트, 핀배열, 회로
8-bit Atmel tinyAVR Microcontroller with
4K Bytes In-System Programmable Flash
ATtiny40
Features
High Performance, Low Power AVR® 8-Bit Microcontroller
Advanced RISC Architecture
– 54 Powerful Instructions – Most Single Clock Cycle Execution
– 16 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 12 MIPS Throughput at 12 MHz
Non-volatile Program and Data Memories
– 4K Bytes of In-System Programmable Flash Program Memory
– 256 Bytes Internal SRAM
– Flash Write/Erase Cycles: 10,000
– Data Retention: 20 Years at 85oC / 100 Years at 25oC
Peripheral Features
– One 8-bit Timer/Counter with Two PWM Channels
– One 8/16-bit Timer/Counter
– 10-bit Analog to Digital Converter
• 12 Single-Ended Channels
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Master/Slave SPI Serial Interface
– Slave TWI Serial Interface
Special Microcontroller Features
– In-System Programmable
– External and Internal Interrupt Sources
– Low Power Idle, ADC Noise Reduction, Stand-by and Power-down Modes
– Enhanced Power-on Reset Circuit
– Internal Calibrated Oscillator
I/O and Packages
– 20-pin SOIC: 18 Programmable I/O Lines
– 20-pin TSSOP: 18 Programmable I/O Lines
– 20-pad VQFN: 18 Programmable I/O Lines
Operating Voltage:
– 1.8 – 5.5V
Programming Voltage:
– 5V
Speed Grade
– 0 – 4 MHz @ 1.8 – 5.5V
– 0 – 8 MHz @ 2.7 – 5.5V
– 0 – 12 MHz @ 4.5 – 5.5V
Industrial Temperature Range
Low Power Consumption
– Active Mode:
• 200 µA at 1 MHz and 1.8V
– Idle Mode:
• 25 µA at 1 MHz and 1.8V
– Power-down Mode:
• < 0.1 µA at 1.8V
8263B–AVR–01/2013




ATtiny40 pdf, 반도체, 판매, 대치품
VCC RESET
PROGRAMMING
LOGIC
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
ISP
INTERFACE
PROGRAM
COUNTER
STACK
POINTER
SRAM
INTERRUPT
UNIT
GENERAL
PURPOSE
REGISTERS
X
Y
Z
ALU
STATUS
REGISTER
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
RESET FLAG
REGISTER
MCU STATUS
REGISTER
TIMER/
COUNTER0
TIMER/
COUNTER1
SPI
TWI
8-BIT DATA BUS
CALIBRATED
OSCILLATOR
TIMING AND
CONTROL
ANALOG
COMPARATOR
ADC
DATA REGISTER
PORT A
DIRECTION
REG. PORT A
DATA REGISTER
PORT B
DIRECTION
REG. PORT B
DATA REGISTER
PORT C
DIRECTION
REG. PORT C
DRIVERS
PORT A
DRIVERS
PORT B
DRIVERS
PORT C
PA[7:0]
PB[3:0]
PC[5:0]
GND
accessed in one single instruction executed in one clock cycle. The resulting architecture is compact and code effi-
cient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATtiny40 provides the following features: 4K bytes of In-System Programmable Flash, 256 bytes of SRAM,
twelve general purpose I/O lines, 16 general purpose working registers, an 8-bit Timer/Counter with two PWM
channels, a 8/16-bit Timer/Counter, Internal and External Interrupts, an eight-channel, 10-bit ADC, a programma-
ble Watchdog Timer with internal oscillator, a slave two-wire interface, a master/slave serial peripheral interface,
an internal calibrated oscillator, and four software selectable power saving modes.
Idle mode stops the CPU while allowing the Timer/Counter, ADC, Analog Comparator, SPI, TWI, and interrupt sys-
tem to continue functioning. ADC Noise Reduction mode minimizes switching noise during ADC conversions by
stopping the CPU and all I/O modules except the ADC. In Power-down mode registers keep their contents and all
chip functions are disabled until the next interrupt or hardware reset. In Standby mode, the oscillator is running
while the rest of the device is sleeping, allowing very fast start-up combined with low power consumption.
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
4

4페이지










ATtiny40 전자부품, 판매, 대치품
The ALU supports arithmetic and logic operations between registers or between a constant and a register. Single
register operations can also be executed in the ALU. After an arithmetic operation, the Status Register is updated
to reflect information about the result of the operation.
Program flow is provided by conditional and unconditional jump and call instructions, capable of directly addressing
the whole address space. Most AVR instructions have a single 16-bit word format but 32-bit wide instructions also
exist. The actual instruction set varies, as some devices only implement a part of the instruction set.
During interrupts and subroutine calls, the return address Program Counter (PC) is stored on the Stack. The Stack
is effectively allocated in the general data SRAM, and consequently the Stack size is only limited by the SRAM size
and the usage of the SRAM. All user programs must initialize the SP in the Reset routine (before subroutines or
interrupts are executed). The Stack Pointer (SP) is read/write accessible in the I/O space. The data SRAM can
easily be accessed through the four different addressing modes supported in the AVR architecture.
The memory spaces in the AVR architecture are all linear and regular memory maps.
A flexible interrupt module has its control registers in the I/O space with an additional Global Interrupt Enable bit in
the Status Register. All interrupts have a separate Interrupt Vector in the Interrupt Vector table. The interrupts have
priority in accordance with their Interrupt Vector position. The lower the Interrupt Vector address, the higher the
priority.
The I/O memory space contains 64 addresses for CPU peripheral functions as Control Registers, SPI, and other
I/O functions. The I/O memory can be accessed as the data space locations, 0x0000 - 0x003F.
4.2 ALU – Arithmetic Logic Unit
The high-performance AVR ALU operates in direct connection with all the 16 general purpose working registers.
Within a single clock cycle, arithmetic operations between general purpose registers or between a register and an
immediate are executed. The ALU operations are divided into three main categories – arithmetic, logical, and bit-
functions. Some implementations of the architecture also provide a powerful multiplier supporting both
signed/unsigned multiplication and fractional format. See document “AVR Instruction Set” and section “Instruction
Set Summary” on page 191 for a detailed description.
4.3 Status Register
The Status Register contains information about the result of the most recently executed arithmetic instruction. This
information can be used for altering program flow in order to perform conditional operations. Note that the Status
Register is updated after all ALU operations, as specified in document “AVR Instruction Set” and section “Instruc-
tion Set Summary” on page 191. This will in many cases remove the need for using the dedicated compare
instructions, resulting in faster and more compact code.
The Status Register is not automatically stored when entering an interrupt routine and restored when returning
from an interrupt. This must be handled by software.
4.4 General Purpose Register File
The Register File is optimized for the AVR Enhanced RISC instruction set. In order to achieve the required perfor-
mance and flexibility, the following input/output schemes are supported by the Register File:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• One 16-bit output operand and one 16-bit result input
Figure 4-2 below shows the structure of the 16 general purpose working registers in the CPU.
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
7

7페이지


구       성 총 30 페이지수
다운로드[ ATtiny40.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
ATtiny4

8-bit AVR Microcontroller

ATMEL Corporation
ATMEL Corporation
ATtiny40

8-bit tinyAVR Microcontroller

ATMEL Corporation
ATMEL Corporation

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵