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PDF ATmega6490A Data sheet ( Hoja de datos )

Número de pieza ATmega6490A
Descripción 8-bit Atmel Microcontroller
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
High Performance, Low Power Atmel® AVR® 8-Bit Microcontroller
Advanced RISC Architecture
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16MIPS Throughput at16MHz (ATmega169A/169PA/649A/649P)
– Up to 20 MIPS Throughput at 20MHz (ATmega329A/329PA/3290A/3290PA/6490A/6490P)
– On-Chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
– In-System Self-programmable Flash Program Memory
• 16Kbytes (ATmega169A/ATmega169PA)
• 32Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA)
• 64Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P)
– EEPROM
• 512bytes (ATmega169A/ATmega169PA)
• 1Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA)
• 2Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P)
– Internal SRAM
• 1Kbytes (ATmega169A/ATmega169PA)
• 2Kbytes (ATmega329A/ATmega329PA/ATmega3290A/ATmega3290PA)
• 4Kbytes (ATmega649A/ATmega649P/ATmega6490A/ATmega6490P)
– Write/Erase cyles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
QTouch® library support
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
– Up to 64 sense channels
JTAG (IEEE std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
– 4 x 25 Segment LCD Driver
(ATmega169A/ATmega169PA/ATmega329A/ATmega329PA/ATmega649A/ATmega649P)
– 4 x 40 Segment LCD Driver (ATmega3290A/ATmega3290PA/ATmega6490A/ATmega6490P)
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby
I/O and Packages
– 54/69 Programmable I/O Lines
64/100-lead TQFP, 64-pad QFN/MLF, and 64-pad DRQFN
Speed Grade:
– ATmega169A/169PA/649A/649P:
• 0 - 16MHz @ 1.8 - 5.5V,
– ATmega3290A/3290PA/6490A/6490P:
• 0 - 20MHz @ 1.8 - 5.5V,
Temperature range:
– -40°C to 85°C Industrial
Ultra-Low Power Consumption (picoPower devices)
– Active mode:
• 1MHz, 1.8V: 215µA
• 32kHz, 1.8V: 8µA (including Oscillator)
• 32kHz, 1.8V: 25µA (including Oscillator and LCD)
– Power-down Mode:
• 0.1µA at 1.8V
– Power-save Mode:
• 0.6µA at 1.8V (Including 32kHz RTC)
• 750nA at 1.8V
8-bit Atmel
Microcontroller
with 16/32/64K
Bytes In-System
Programmable
Flash
ATmega169A
ATmega169PA
ATmega329A
ATmega329PA
ATmega649A
ATmega649P
ATmega3290A
ATmega3290PA
ATmega6490A
ATmega6490P
8284D–AVR–6/11

1 page




ATmega6490A pdf
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
2. Overview
The ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is a low-power CMOS 8-bit microcon-
troller based on the Atmel®AVR® enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
the ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P achieves throughputs approaching 1
MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
2.1 Block Diagram
Figure 2-1. Block Diagram
GND
VCC
AVCC
AGND
AREF
PF0 - PF7
PA0 - PA7
PC0 - PC7
PORTF DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
PORTA DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
8-BIT DATA BUS
DATA DIR.
REG. PORTC
ADC
JTAG TAP
PROGRAM
COUNTER
STACK
POINTER
ON-CHIP DEBUG
BOUNDARY-
SCAN
PROGRAMMING
LOGIC
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
SRAM
GENERAL
PURPOSE
REGISTERS
X
Y
Z
ALU
AVR CPU
STATUS
REGISTER
USART
UNIVERSAL
SERIAL INTERFACE
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
MCU CONTROL
REGISTER
TIMER/
COUNTERS
INTERRUPT
UNIT
EEPROM
CALIB. OSC
OSCILLATOR
TIMING AND
CONTROL
LCD
CONTROLLER/
DRIVER
SPI
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG. DATA DIR.
PORTG REG. PORTG
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PE0 - PE7
PB0 - PB7
PD0 - PD7
PG0 - PG4
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
8284D–AVR–6/11
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ATmega6490A arduino
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
3. Resources
A comprehensive set of development tools, application notes and datasheets are available for
download on http://www.atmel.com/avr.
Note: 1.
4. Data Retention
Reliability Qualification results show that the projected data retention failure rate is much less
than 1 PPM over 20 years at 85°C or 100 years at 25°C.
5. About Code Examples
This documentation contains simple code examples that briefly show how to use various parts of
the device. These code examples assume that the part specific header file is included before
compilation. Be aware that not all C compiler vendors include bit definitions in the header files
and interrupt handling in C is compiler dependent. Please confirm with the C compiler documen-
tation for more details.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
6. Capacitive touch sensing
The Atmel® QTouch® Library provides a simple to use solution to realize touch sensitive inter-
faces on most Atmel AVR® microcontrollers. The QTouch Library includes support for the
QTouch and QMatrix® acquisition methods.
Touch sensing can be added to any application by linking the appropriate Atmel QTouch Library
for the AVR Microcontroller. This is done by using a simple set of APIs to define the touch chan-
nels and sensors, and then calling the touch sensing API’s to retrieve the channel information
and determine the touch sensor states.
The QTouch Library is FREE and downloadable from the Atmel website at the following location:
www.atmel.com/qtouchlibrary. For implementation details and other information, refer to the
Atmel QTouch Library User Guide - also available for download from the Atmel website.
8284D–AVR–6/11
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