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PDF ATxmega32E5 Data sheet ( Hoja de datos )
| Número de pieza | ATxmega32E5 | |
| Descripción | 8/16-bit Atmel AVR XMEGA Microcontrollers | |
| Fabricantes | ATMEL Corporation | |
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8/16-bit Atmel AVR XMEGA Microcontrollers
ATxmega32E5 / ATxmega16E5 / ATxmega8E5
DATASHEET
Features
High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller
Nonvolatile program and data memories
8K –32KB of in-system self-programmable flash
2K – 4KB boot section
512Bytes – 1KB EEPROM
1K – 4KB internal SRAM
Peripheral features
Four-channel enhanced DMA controller with 8/16-bit address match
Eight-channel event system
Asynchronous and synchronous signal routing
Quadrature encoder with rotary filter
Three 16-bit timer/counters
One timer/counter with four output compare or input capture channels
Two timer/counter with two output compare or input capture channels
High resolution extension enabling down to 4ns PWM resolution
Waveform extension for control of motor, LED, lighting, H-bridge, high drives, and more
Fault extension for safe and deterministic handling and/or shut-down of external driver
CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3) generator
XMEGA Custom Logic (XCL) module with timer, counter and logic functions
Two 8-bit timer/counters with capture/compare and 16-bit cascade mode
Connected to one USART to support custom data frame length
Connected to I/O pins and event system to do programmable logic functions
MUX, AND, NAND, OR, NOR, XOR, XNOR, NOT, D-Flip-Flop, D Latch, RS Latch
Two USARTs with full-duplex and single wire half-duplex configuration
Master SPI mode
Support custom protocols with configurable data frame length up to 256-bit
System wake-up from deep sleep modes when used with internal 8MHz oscillator
One two-wire interface with dual address match (I2C and SMBus compatible)
Bridge configuration for simultaneous master and slave operation
Up to 1MHz bus speed support
One serial peripheral interface (SPI)
16-bit real time counter with separate oscillator and digital correction
One sixteen-channel, 12-bit, 300ksps Analog to Digital Converter with:
Offset and gain correction
Averaging
Over-sampling and decimation
One two-channel, 12-bit, 1Msps Digital to Analog Converter
Two Analog Comparators with window compare function and current sources
External interrupts on all general purpose I/O pins
Programmable watchdog timer with separate on-chip ultra low power oscillator
QTouch® library support
Capacitive touch buttons, sliders and wheels
Special microcontroller features
Power-on reset and programmable brown-out detection
Internal and external clock options with PLL
Programmable multilevel interrupt controller
Five sleep modes
Programming and debug interface
PDI (Program and Debug Interface)
I/O and Packages
26 programmable I/O pins
7x7mm 32-lead TQFP
5x5mm 32-lead VQFN
4x4mm 32-lead UQFN
Operating Voltage
1.6 – 3.6V
Operating frequency
0 – 12MHz from 1.6V
0 – 32MHz from 2.7V
Atmel 8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014
1 page  
4. Overview
The Atmel AVR XMEGA is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers based
on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the AVR XMEGA devices
achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system
designer to optimize power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly
connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a single instruction,
executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs many times
faster than conventional single-accumulator or CISC based microcontrollers.
The AVR XMEGA E5 devices provide the following features: in-system programmable flash with read-while-write
capabilities; internal EEPROM and SRAM; four-channel enhanced DMA (EDMA) controller; eight-channel event system
with asynchronous event support; programmable multilevel interrupt controller; 26 general purpose I/O lines; CRC-16
(CRC-CCITT) and CRC-32 (IEEE 802.3) generators; one XMEGA Custom Logic module with timer, counter and logic
functions (XCL); 16-bit real-time counter (RTC) with digital correction; three flexible, 16-bit timer/counters with compare
and PWM channels; two USARTs; one two-wire serial interface (TWI) allowing simultaneous master and slave; one
serial peripheral interface (SPI); one sixteen-channel, 12-bit ADC with programmable gain, offset and gain correction,
averaging, over-sampling and decimation; one 2-channel 12-bit DAC; two analog comparators (ACs) with window mode
and current sources; programmable watchdog timer with separate internal oscillator; accurate internal oscillators with
PLL and prescaler; and programmable brown-out detection.
The program and debug interface (PDI), a fast, two-pin interface for programming and debugging, is available.
The AVR XMEGA E5 devices have five software selectable power saving modes. The idle mode stops the CPU while
allowing the SRAM, EDMA controller, event system, interrupt controller, and all peripherals to continue functioning. The
power-down mode saves the SRAM and register contents, but stops the oscillators, disabling all other functions until the
next TWI, or pin-change interrupt, or reset. In power-save mode, the asynchronous real-time counter continues to run,
allowing the application to maintain a timer base while the rest of the device is sleeping. In standby mode, the external
crystal oscillator keeps running while the rest of the device is sleeping. This allows very fast startup from the external
crystal, combined with low power consumption. In extended standby mode, both the main oscillator and the
asynchronous timer continue to run. In each power save, standby or extended standby mode, the low power mode of the
internal 8MHz oscillator allows very fast startup time combined with very low power consumption.
To further reduce power consumption, the peripheral clock to each individual peripheral can optionally be stopped in
active mode and idle sleep mode and low power mode of the internal 8MHz oscillator can be enabled.
Atmel offers a free QTouch library for embedding capacitive touch buttons, sliders and wheels functionality into AVR
microcontrollers. The devices are manufactured using Atmel high-density, nonvolatile memory technology. The program
flash memory can be reprogrammed in-system through the PDI. A boot loader running in the device can use any
interface to download the application program to the flash memory. The boot loader software in the boot flash section can
continue to run. By combining an 8/16-bit RISC CPU with in-system, self-programmable flash, the AVR XMEGA is a
powerful microcontroller family that provides a highly flexible and cost effective solution for many embedded applications.
All Atmel AVR XMEGA devices are supported with a full suite of program and system development tools, including C
compilers, macro assemblers, program debugger/simulators, programmers, and evaluation kits.
XMEGA E5 [DATASHEET]
Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014
5
5 Page 
8. Memories
8.1 Features
Flash program memory
One linear address space
In-system programmable
Self-programming and boot loader support
Application section for application code
Application table section for application code or data storage
Boot section for application code or bootloader code
Separate read/write protection lock bits for all sections
Built in fast CRC check of a selectable flash program memory section
Data memory
One linear address space
Single-cycle access from CPU
SRAM
EEPROM
Byte and page accessible
Memory mapped for direct load and store
I/O memory
Configuration and status registers for all peripherals and modules
Four bit-accessible general purpose registers for global variables or flags
Bus arbitration
Deterministic handling of priority between CPU, EDMA controller, and other bus masters
Separate buses for SRAM, EEPROM, and I/O memory
Simultaneous bus access for CPU and EDMA controller
Production signature row memory for factory programmed data
ID for each microcontroller device type
Serial number for each device
Calibration bytes for factory calibrated peripherals
User signature row
One flash page in size
Can be read and written from software
Content is kept after chip erase
8.2 Overview
The Atmel AVR architecture has two main memory spaces, the program memory and the data memory. Executable code
can reside only in the program memory, while data can be stored in the program memory and the data memory. The data
memory includes the internal SRAM, and EEPROM for nonvolatile data storage. All memory spaces are linear and
require no memory bank switching. Nonvolatile memory (NVM) spaces can be locked for further write and read/write
operations. This prevents unrestricted access to the application software.
A separate memory section contains the fuse bytes. These are used for configuring important system functions, and can
only be written by an external programmer.
The available memory size configurations are shown in “Ordering Information” on page 2”. In addition, each device has a
Flash memory signature row for calibration data, device identification, serial number etc.
8.3 Flash Program Memory
The Atmel AVR XMEGA devices contain on-chip, in-system reprogrammable flash memory for program storage. The
flash memory can be accessed for read and write from an external programmer through the PDI or from application
software running in the device.
XMEGA E5 [DATASHEET]
Atmel-8153J–AVR-ATxmega8E5-ATxmega16E5-ATxmega32E5_Datasheet–11/2014
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATxmega32E5.PDF ] | |
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