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AT80C51RD2 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 AT80C51RD2
기능 80C51 High Performance ROM 8-bit Microcontroller
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AT80C51RD2 데이터시트, 핀배열, 회로
Features
80C52 Compatible
– Four 8-bit I/O Ports
– Three 16-bit Timer/Counters
– 256 Bytes Scratch Pad RAM
– 8 Interrupt Sources with 4 Priority Levels
– Dual Data Pointer
Variable Length MOVX for Slow RAM/Peripherals
High-speed Architecture
– 10 to 40 MHz in Standard Mode
16K/32K Bytes On-Chip ROM Program
AT80C51RD2 ROMless Versions
On-Chip 1024 bytes Expanded RAM (XRAM)
– Software Selectable Size (0, 256, 512, 768, 1024 bytes)
– 256 Bytes Selected at Reset
Keyboard Interrupt Interface on Port P1
8-bit Clock Prescaler
64K Program and Data Memory Spaces
Improved X2 Mode with Independant Selection for CPU and Each Peripheral
Programmable Counter Array 5 Channels with:
– High-speed Output
– Compare/Capture
– Pulse Width Modulator
– Watchdog Timer Capabilities
Asynchronous Port Reset
Full Duplex Enhanced UART
Dedicated Baud Rate Generator for UART
Low EMI (Inhibit ALE)
Hardware Watchdog Timer (One-time Enabled with Reset-out)
Power Control Modes
– Idle Mode
– Power-down Mode
– Power-off Flag
Power Supply: 2.7V to 5.5V
Temperature Ranges: Commercial (0 to +70°C) and Industrial (-40°C to +85°C)
Packages: PDIL40, PLCC44, VQFP44
80C51 High
Performance
ROM 8-bit
Microcontroller
AT80C51RD2




AT80C51RD2 pdf, 반도체, 판매, 대치품
Table 3-1. Pin Description
Mnemonic
VSS
VCC
P0.0 - P0.7
P1.0 - P1.7
XTAL1
XTAL2
Pin Number
DIL PLCC44 VQFP44 1.4
20 22
16
40 44
38
39 - 32 43 - 36
37 - 30
1-8
2-9
40 - 44
1-3
12
23
34
45
56
67
78
89
19 21
18 20
40
41
42
43
44
1
2
3
15
14
Type
I
I
I/O
I/O
I/O
I/O
I/O
I
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
Name and Function
Ground: 0V reference
Power Supply: This is the power supply voltage for normal, idle and power-down
operation
Port 0: Port 0 is an open-drain, bi-directional I/O port. Port 0 pins that have 1s
written to them float and can be used as high impedance inputs. Port 0 must be
polarized to VCC or VSS in order to prevent any parasitic current consumption. Port
0 is also the multiplexed low-order address and data bus during access to external
program and data memory. In this application, it uses strong internal pull-up when
emitting 1s. Port 0 also inputs the code bytes during EPROM programming.
External pull-ups are required during program verification during which P0 outputs
the code bytes.
Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins
that have 1s written to them are pulled high by the internal pull-ups and can be
used as inputs. As inputs, Port 1 pins that are externally pulled low will source
current because of the internal pull-ups. Port 1 also receives the low-order address
byte during memory programming and verification.
Alternate functions for T89C51RB2/RC2 Port 1 include:
P1.0: Input/Output
T2 (P1.0): Timer/Counter 2 external count input/Clockout
P1.1: Input/Output
T2EX: Timer/Counter 2 Reload/Capture/Direction Control
P1.2: Input/Output
ECI: External Clock for the PCA
P1.3: Input/Output
CEX0: Capture/Compare External I/O for PCA module 0
P1.4: Input/Output
CEX1: Capture/Compare External I/O for PCA module 1
P1.5: Input/Output
CEX2: Capture/Compare External I/O for PCA module 2
P1.6: Input/Output
CEX3: Capture/Compare External I/O for PCA module 3
P1.7: Input/Output:
CEX4: Capture/Compare External I/O for PCA module 4
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
Crystal 2: Output from the inverting oscillator amplifier
4 AT80C51RD2
4113D–8051–01/09

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AT80C51RD2 전자부품, 판매, 대치품
AT80C51RD2
Table 3 shows all SFRs with their address and their reset value.
Table 4-1. SFR Mapping
Bit
Addressable
Non-bit Addressable
0/8
1/9
2/A 3/B
4/C 5/D
6/E
F8h
CH
CCAP0H
CCAP1H
CCAPL2H
CCAPL3H
CCAPL4H
0000 0000 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
F0h B
0000 0000
E8h
CL
CCAP0L
CCAP1L
CCAPL2L
CCAPL3L
CCAPL4L
0000 0000 XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX XXXX
E0h ACC
0000 0000
D8h CCON
00X0 0000
CMOD
00XX X000
CCAPM0
X000 0000
CCAPM1
X000 0000
CCAPM2
X000 0000
CCAPM3
X000 0000
CCAPM4
X000 0000
D0h PSW
0000 0000
C8h T2CON
0000 0000
T2MOD
XXXX XX00
RCAP2L
0000 0000
RCAP2H
0000 0000
TL2
0000 0000
TH2
0000 0000
C0h
7/F
FFh
F7h
EFh
E7h
DFh
D7h
CFh
C7h
B8h IPL0
X000 000
SADEN
0000 0000
B0h P3
IE1
IPL1
IPH1
1111 1111 XXXX XXX0b XXXX XXX0b XXXX XXX0b
A8h IE0
0000 0000
SADDR
0000 0000
A0h P2
1111 1111
AUXR1
XXXX XXX0
98h SCON
SBUF
BRL
0000 0000 XXXX XXXX 0000 0000
BDRCON
XXX0 0000
KBLS
0000 0000
90h P1
1111 1111
88h TCON
0000 0000
TMOD
0000 0000
TL0
0000 0000
TL1
0000 0000
TH0
0000 0000
80h P0
1111 1111
SP
0000 0111
DPL
0000 0000
DPH
0000 0000
0/8 1/9 2/A 3/B 4/C
BFh
IPH0
X000 0000
B7h
AFh
KBE
0000 0000
TH1
0000 0000
5/D
WDTRST
XXXX XXXX
KBF
0000 0000
AUXR
XX0X 0000
6/E
WDTPRG
XXXX X000
CKRL
1111 1111
CKCON0
0000 0000
PCON
00X1 0000
7/F
A7h
9Fh
97h
8Fh
87h
Reserved
4113D–8051–01/09
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